Dtp Function - Fujitsu MB90460 Series Hardware Manual

F2mc-16lx 16-bit microcontroller
Table of Contents

Advertisement

18.5.2

DTP Function

The DTP/external interrupt circuit has a DTP function that detects a signal supplied to a
DTP/external interrupt pin from an external peripheral and activates the extended
intelligent I/O service.
■ Operation of the DTP Function
The DTP function detects a data transfer request signal from an external peripheral to automatically transfer
data between memory and the peripheral.
The extended intelligent I/O service (EI
detection. The operation of the DTP function is the same as that of the external interrupt function up to the
point that the CPU accepts an interrupt request. If the operation of EI
is activated to start data transfer when an interrupt request is accepted. When the transfer of one data unit
ends, the descriptor is updated and the interrupt request flag bit is cleared to wait for the next request from
the pin. When the entire transfer using EI
processing routine.
The external peripheral must remove only the level of the data transfer request signal (DTP external
interrupt cause) within three cycles of the first transfer.
Figure 18.5-3 Example of Interfacing to the External Peripheral
Input to the INTO pin
(DTP/external interrupt cause)
Internal operation of
the CPU (microprogram)
Address bus pin
Data bus pin
Read signal
Write signal
Data, address bus
DTP/external
interrupt cause
IRQ
Data
transfer
request
*1, *2 : Must be removed within three machine cycles of transfer.
*3
: If the extended intelligent I/O service is in peripheral -> memory transfer mode.
2
Rising edge request, or H level request (ELVR: LB0, LA0 = 01
*Intelligent I/O service data transfer
from i/o register to memory.
Descriptor selection
and reading
Read operation
*2
INT
DTP/external
interrupt circuit
MB90460/465 series
CHAPTER 18 DTP/EXTERNAL INTERRUPT CIRCUIT
OS) is activated by the external interrupt function using level
2
OS is completed, control is transferred to the interrupt
Read address
Read data
*1
Internal bus
*1
Interrupt
request
CPU
2
(EI
OS)
2
OS is enabled (ICR:ISE = 1), EI
)
B
Descriptor updating
Write address
Write data
Write
*3
operation
Internal
Memory
2
OS
529

Advertisement

Table of Contents
loading

This manual is also suitable for:

Mb90465 series

Table of Contents