Hardware Interrupt Processing Time - Fujitsu MB90460 Series Hardware Manual

7.4.5

Hardware Interrupt Processing Time

From the generation of a hardware interrupt request to the execution of an interrupt
processing routine, the time for the instruction currently being executed to terminate
and the time required to handle an interrupt are necessary.
■ Hardware Interrupt Processing Time
From the generation of a hardware interrupt request to the acceptance of the interrupt and to the execution
of an interrupt processing routine, the time to wait for sampling for an interrupt request and the time
required to handle an interrupt (time to prepare for interrupt processing) are necessary. Figure 7.4-6 shows
the interrupt processing time.
CPU operation
Interrupt wait time
●
Interrupt request sampling wait time
The interrupt request sampling wait time is the time from the generation of and interrupt request to the
termination of the instruction currently being executed.
Whether an interrupt request has been generated is determined by sampling the instruction for an interrupt
request in the final cycle of the instruction. Consequently, the CPU cannot identify an interrupt request
during execution of each instruction creating a delay.
The interrupt request sampling wait time is the maximum when an interrupt request is generated as soon as
the POPW RW0, ... RW7 instruction (45 machine cycles), which takes the longest to execute, starts.
Figure 7.4-6 Interrupt Processing Time
Ordinary instruction
execution
Interrupt request
sampling wait time
Interrupt request generation
: The final instruction cycle samples the interrupt request here.
: One machine cycle corresponds to one machine clock ( ).
Interrupt processing
Interrupt handling
routine
Interrupt handling time
( machine cycle) (*)
CHAPTER 7 INTERRUPT
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