Table of Contents
Advertisement
15.6.3
Operation of Output Data Buffer Register
The Output Data Buffer Register (OPDBR) is composed of twelve registers. By loading
different OPDBR register into the Output Data Register (OPDR), various kind of
waveform is output at the Multi-pulse Generator Output (OPT5 to OPT0).
■ Operation of Output Data Buffer Register
The data in the Output Data Buffer Register (OPDBR) whose address specified by the BNKF, RDA2 to
RDA0 bits is transferred to the Output Data Register (OPDR) at the write timing generated by the Data
Write Control Unit.
The BNKF, RDA2 to RDA0 bits of the Output Data Buffer Register (OPDBR) decide the order of data
transfer to the Output Data Register (OPDR), and the OPx1/OPx0 bits decide the shape of the output
waveform. The output waveform is updated automatically as long as the write timing (WTO) is generated.
An example of setting the Output Data Buffer Register (OPDBR) is shown in Table 15.6-3.
Table 15.6-3 Output Data Buffer Register (OPDBR)
No.
BNKF
RDA2
RDA1
RDA0
OP51
OP50
OP41
OP40
OP31
OP30
OP21
OP20
OP11
OP10
OP01
OP00
OPBDR No. Sequence
OPT5 Output
OPT4 Output
OPT3 Output
OPT2 Output
OPT1 Output
OPT0 Output
0
1
2
3
0
0
0
0
1
1
0
0
0
0
1
0
0
1
1
1
0
0
0
1
0
0
1
1
1
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
1
0
0
1
0
0
0
1
0
1
4
5
3
1
L
L
PPG
H
H
PPG
L
L
L
L
L
L
PPG
L
L
L
L
L
H
L
L
H
L
PPG
CHAPTER 15 MULTI-PULSE GENERATOR
4
5
6
7
0
1
0
X
1
0
0
X
1
1
1
X
0
0
0
X
0
0
0
X
0
0
0
X
0
1
0
X
0
1
0
X
0
0
1
X
1
0
1
X
1
0
0
X
1
1
0
X
0
0
0
X
0
0
1
X
0
0
0
X
0
0
0
X
6
A
2
X
L
L
L
X
L
H
L
X
PPG
L
H
X
H
PPG
L
X
L
L
PPG
X
L
L
L
X
8
9
A
X
0
1
X
1
0
X
0
1
X
0
1
X
0
0
X
0
1
X
0
0
X
1
0
X
0
0
X
0
0
X
0
0
X
0
0
X
0
1
X
0
1
X
1
0
X
1
0
X
4
B
X
L
PPG
X
PPG
L
X
L
L
X
L
L
X
L
H
X
H
L
405
Advertisement
Table of Contents
