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CHAPTER 15 MULTI-PULSE GENERATOR
15.6.6
Operation of Noise Cancellation Function
This section describes the noise cancellation function for the SNIx and DTTI1 pins.
■ Operation of Noise Cancellation Function
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DTTI1 Pin Noise Cancellation Function
When NRSL bit (bit12) of the Output Control Register (OPCR) is set to "1", the noise cancellation function
for DTTI1 pin input can be used. When the noise cancellation function is selected, the time for fixing an
output pin at the inactive level is delayed for about 4, 8, 16 or 32 machine clocks by the noise cancellation
circuit.
Note:
Since the DTTI1 Input Control Circuit uses a peripheral clock, input is invalidated even if the DTTI1
input is enabled in a mode such as STOP mode in which the oscillator stops.
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SNI2 to SNI0 Pins Noise Cancellation Function
When SNC2 to SNC0 bits (bit5 to bit3) of the Input Control Register (IPCR) are set to "1", the noise
cancellation function for SNI2 to SNI0 pins input can be used. When the noise cancellation function is
selected, the input is delayed for about four machine clocks by the noise cancellation circuit. Since the
noise cancellation circuit uses a peripheral clock, input is invalidated in a mode such as STOP mode in
which the oscillator stops even if the SNIx input is enabled.
●
Programmable Noise Cancellation Circuit
Noise to be cancelled is programmable to have pulse width less than 4, 8, 16 and 32 machine cycles, i.e.
for 16 MHz machine clock, the circuit can filter 0.25 µs to 2 µs width pulses. The control for the
programming of the noise cancellation circuit of the SNIx and DTTI1's pins are separated. Figure 15.4-13
shows the noise cancellation control register.
424
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