Fujitsu MB90460 Series Hardware Manual page 141

CHAPTER 7 INTERRUPT
Figure 7.3-2 Interrupt Control Registers (ICR00 to ICR15) during reading
Reading
bit 7
Address
-
0000B0
H
to
0000BF
H
122
6 5 4 3
- S1 S0 ISE IL2
R R R/W R/W
R/W: Read/write
R: Write-only
- : Not used
X: Undefined
: Initial value
2 1 0
Initial value
IL1 IL0
XX000111
R/W R/W
IL2 IL1 IL0
0 0 0
0 0 1
0
0 1
1 1
0
0 0
1
0 1
1
1 0
1
1 1
1
ISE
0
Activates the interrupt sequence when an interrupt occurs
2
1 Activates EI OS when an interrupt occurs
S1 S0
2
0 0
EI OS operation in progress or EI
0 1
Stopped status due to count termination
Reserved
1 0
1 1
Stopped status due to a request from the peripheral function
B
Interrupt level setting bit
Interrupt level 0 (highest)
Interrupt level 7 (no interrupt)
2
EI OS enable bit
2
EI OS status
2
OS not activated