Fujitsu MB90460 Series Hardware Manual page 338

Table 14.4-11 Waveform Control Register (SIGCR)
Bit name
DTIE:
bit15 DTTI0 input
enable bit
DTIF:
bit14 DTTI0 interrupt
flag bit
NRSL:
Noise
bit13 cancellation
function
enable bit
bit12 DCK2 to DCK0:
to Operating clock
bit10 selection bit
NWS1, NWS0:
bit9, DTTI0 Noise
bit8 width selection
bits
• This bit is used to enable the DTTI0 pin to control the output level of RTO0 to RTO5
pin.
• This bit is an interrupt flag for DTTI0.
• When DTTI0 input is enabled (DTIE=1) and low level of DTTI0 is detected, this bit
will be set and interrupt request will send to CPU.
• Writing "0" will clear this bit.
• Writing "1" has no effect.
• In read-modify-write operation, "1" is always read.
(Notes)
• If noise cancellation function is enabled (NRSL=1), this bit will be set to "1" when
noise pulse width is passed.
• If both software clear (writing "0") and hardware set (low level of DTTI0 is detected)
occurs simultaneously, software clear takes the higher priority to clear this bit.
• This bit is used to enable the noise cancellation function.
• Noise cancellation circuit will receive DTTI0 input signal when the low level is held
until the counter overflows. The counter is n-bit counter which is operated by the low
level input. The value of n can be 2, 3, 4 and 5 which depends on the setting of NWS1
and NWS0.
(Notes)
• To cancel the noise pulse width, it takes approximately 2n machine cycles.
• When the noise cancellation circuit is selected, the input will become invalid in a
mode such as STOP mode in which the internal clock is stopped.
• These bits are used to select the operating clock for the 16-bit timer.
• These bits are used to select the noise pulse width to be removed for DTTI0 pin.
CHAPTER 14 MULTI-FUNCTIONAL TIMER
Function
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