Fujitsu MB90460 Series Hardware Manual page 361

CHAPTER 14 MULTI-FUNCTIONAL TIMER
14.6.4.1 Operation in Timer Mode
With RT0 to RT5 rising edge, the 16-bit timer is reloaded, starts down-counting and the
PPG timer 0 keeps outputting to RTO0 to RTO5 until the 16-bit timer is underflow.
■ PPG0 Output Pulse from Tising Rdge of RT to 16-bit Timer Underflow
(DTCR0/DTCR1/DTCR2:TMD2 to TMD0=010
Figure 14.6-24 Waveform generated when TMD2 to TMD0=010
Setting up registers:
T CDT
T CCS
CPCLR
OCCP0 to OCCP5 : XXXX
OCS0 to OCS5
DTCR0 to DTCR2 : 011XX010
TMRR0 to TMRR2 : XXXX
SIGCR
Note: "X" must be set according to the operation.
16-bit free-run timer
FFFF
Count BFFF
value
7FFF
3FFF
Compare register 0
Compare register 1
Note:
Each 16-bit timer is used for two RTs. i.e. 16-bit timer 0 is used for RT0 and RT1; 16-bit timer 1 is
used for RT2 and RT3; 16-bit timer 2 is used for RT4 and RT5. Therefore, do not use an RT and
attempt to start PPG0 which is under operation. Doing so may cause that the outputting GATE signal
will be extended and malfunction will be occurred.
342
: 0000
H
: XXXXXXXXXX0X0XXX
: XXXX (Cycle setting)
H
(Compare value)
H
: -XX0XXXXXXXXXX11
B
(Non-overlap timing setting)
H
: XXXXXX00 (DTTI input and 16-bit timer count clock setting)
B
H
H
H
H
0000
H
PPG0
BFFF
H
value
7FFF
H
value
RT0
RT1
GAT E
RTO0
RTO1
)
B
PCSR
PDUT
B
PCNT
PICS01
B
Time of
Time of
16-bit timer 0
16-bit timer 0
B
: XXXX
H
: XXXX
H
: XXXX
H
: XX (PPG0 output selection)
H
Time