Cgpllsel (Pll Selection Register) - Toshiba TX03 Series Manual

6.2.5

CGPLLSEL (PLL Selection Register)

31
bit symbol -
After reset 0
23
bit symbol -
After reset 0
15
bit symbol -
After reset 1
7
bit symbol -
After reset 0
Bit Bit Symbol Type
31-16 − R
15-12 − R/W
11 − R
10-8 − R/W
7-1 − R/W
0 PLLSEL R/W
Note: When using f
30 29 28
- - -
0 0 0
22 21 20
- - -
0 0 0
14 13 12
- - -
1 0 1
6 5 4
- - -
0 0 1
Read as "0".
Write "1101"
Read as "0".
Write "000"
Write "0001111"
Use of PLL
0: fosc use
1: f use
PLL
Specifies use or disuse of the clock multiplied by the PLL.
"fosc (internal high-speed oscillator)" is automatically set after reset.Resetting is required when using the
PLL.
as system clock, do not use PLL multiplying.
IHOSC
Page 51
27 26 25
- - -
0 0 0
19 18 17
- - -
0 0 0
11 10 9
- - -
0 0 0
3 2 1
- - -
1 1 1
Function
TMPM3V6/M3V4
24
-
0
16
-
0
8
-
0
0
PLLSEL
0
2019-02-06