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12. Serial Channel with 4bytes FIFO (SIO/UART)
12.1
Overview
Serial channel (SIO/UART) has the modes shown below.
・ Synchronous communication mode (I/O interface mode)
・ Asynchronous communication mode (UART mode)
Their features are given in the following.
・ Transfer Clock
-
Dividing by the prescaler, from the peripheral clock (φT0) frequency into 1/1, 1/2, 1/4, 1/8, 1/16,
1/32, 1/64, 1/128.
-
Make it possible to divide from the prescaler output clock frequency into 1 to 16.
-
Make it possible to divide from the prescaler output clock frequency into N+m/16 (N=2 to 15, m=1
to 15). (only UART mode)
-
The usable system clock (fsys) (only UART mode).
・ Buffer
-
The usable double buffer function.
-
Make it possible to clear the transmit buffer.
・ FIFO
The usable 4 byte FIFO including transmit and receive.
・ I/O Interface Mode
-
Transfer Mode: the half duplex (transmit/receive), the full duplex
-
Clock: Output (fixed rising edge) /Input (selectable either rising or falling edge)
-
Make it possible to specify the interval time of continuous transmission.
-
The state of TXDx pin after output of the last bit can be selected as follow:
Keep a "High" level, "Low" level or the state of the last bit
-
The state of TXDx pin when an under run error is occurred in clock input mode can be selected as fol-
low:
Keep a "High" level or "Low" level
-
The last bit hold time of TXDx pin can be specified in clock input mode.
・ UART Mode
-
Data length: 7 bits, 8bits, 9bits
-
Add parity bit (to be against 9bits data length)
-
Serial links to use wake-up function
-
Handshaking function with CTSx pin
-
Noise cancel for RXDx pin
In the following explanation, "x" represents channel number.
Page 211
TMPM3V6/M3V4
2019-02-06
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