Toshiba TX03 Series Manual page 469

Note that when the system reset occurs, FCPMRA<BLKM[3:0]> is set to "1".
The contents of the protect bit are maintained in the non-maskable state.
FCPMRA<BLKM[3:0]> should be written as follows:
Note: Use a 32-bit transfer instruction when the following writing operations, item1 and 2.
1. Write the specified code (0xa74a9d23) to FCPMRA
2. Write data within 16 clocks after the operation of item 1.
Note: When the security function is enabled,even if All the protection bit is masked ,Automatic Chip
Erase can not be used.
22.1.5.3 Security Function
Table 22-3 shows operations when the security function is enabled.
Table 22-3 Operations when the security function is enabled.
Item
Read flash memory
Debug port
Command execution to Flash memory
The security function is enabled under the following conditions;
1. FCSECBIT<SECBIT> is set to "1".
2. All protect bits (FCPSRA<BLK>) are set to "1".
FCSECBIT<SECBIT> is set to "1" by the power-on reset. Rewriting of FCSECBIT <SECBIT> is descri-
bed in below.
Note: Use a 32-bit transfer instruction when the following writing operations, item1 and 2.
1. Write the specified code (0xa74a9d23) to FCSECBIT
2. Write data within 16 clocks after the operation of item 1.
Description
CPU can read flash memory.
JTAG, serial wire or trace communication is disabled.
Command write to flash memory is not accepted. If a user tries
to erase a protect bit, chip erase is executed and all protect bits
are erased.
Page 447
TMPM3V6/M3V4
2019-02-06