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17.3.3.10
RTCPAGER(PAGE register(PAGE0/1))
7
Bit symbol
INTENA
After reset
0
Bit
Bit Symbol
Type
7
INTENA
R/W
6-5
−
R
4
ADJUST
R/W
3
ENATMR
R/W
2
ENAALM
R/W
1
−
R
0
PAGE
R/W
Note 1: A read-modify-write operation cannot be performed.
Note 2: To set interrupt enable bits to <ENATMR>, <ENAALM> and <INTENA>, you must follow the order specified here.
Make sure not to set them at the same time (make sure that there is time lag between interrupt enable and clock/
alarm enable).To change the setting of <ENATMR> and <ENAALM>, <INTENA> must be disabled first.
Example: Clock setting/Alarm setting
RTCPAGER
←
RTCPAGER
←
6
5
4
-
-
ADJUST
0
0
0
INTRTC
0:Disable
1:Enable
Read as 0.
[Write]
0: Don't care
1: Sets ADJUST request
Adjusts seconds. The request is sampled when the sec. counter counts up.
If the time elapsed is between 0 and 29 seconds, the sec. counter is cleared to "0".
If the time elapsed is between 30 and 59 seconds, the min. counter is carried and sec. counter is cleared
to "0".
[Read]
0: ADJUST no request
1: ADJUST requested
If "1" is read, it indicates that ADJUST is being executed. If "0" is read, it indicates that the execution
is finished.
Clock
0: Disable
1: Enable
ALARM
0: Disable
1: Enable
Read as 0.
PAGE selection
0:Selects Page0
1:Selects Page1
7
6
5
4
3
2
1
0
0
0
0
1
1
0
1
0
0
0
1
1
0
Page 407
3
2
ENATMR
ENAALM
Undefined
Undefined
Function
0
0
Enables Clock and alarm
0
Enables interrupt
TMPM3V6/M3V4
1
0
-
PAGE
0
0
2019-02-06
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