Toshiba TX03 Series Manual page 334

14. Synchronous Serial Port (SSP)
14.3 Register
14.3.2 SSPCR0(Control register 0)
bit symbol
After Reset Undefined
bit symbol
After Reset Undefined
bit symbol
After Reset
bit symbol
After Reset
Bit Bit Symbol
31-16 −
15-8 SCR[7:0]
7 SPH
6 SPO
5-4 FRF[1:0]
3-0 DSS[3:0]
Note: Set a clock prescaler to SSPCR0<SCR[7:0]> = 0x00 , SSPCPSR<CPSDVSR[7:0]> = 0x02, when
2019-02-06
31 30
- -
Undefined Undefined
23 22
- -
Undefined Undefined
15 14
0 0
7 6
SPH SPO
0 0
Type
W Write as "0".
R/W For serial clock rate setting.
Parameter : 0x00 to 0xFF.
Bits to generate the SSP transmit bit rate and receive bit rate.
This bit rate can be obtained by the following equation.
Bit rate = f / (<CPSDVSR> × (1+ <SCR>))
sys
<CPSDVSR> is an even number between 2 to 254, which is programmed by the SSPCPSR register, and
<SCR> takes a value between 0 to 255.
R/W SPCLK phase:
0 : Captures data at the 1st clock edge.
1 : Captures data at the 2nd clock edge.
This is applicable to Motorola SPI frame format only. Refer to Section "Motorola SPI frame format"
R/W SPCLK polarity:
0:SPCLK is in Low state.
1:SPCLK is in High state.
This is applicable to Motorola SPI frame format only. Refer to Section "Motorola SPI frame format"
R/W Frame format:
00: SPI frame format
01: SSI serial frame format
10: Microwire frame format
11: Reserved, undefined operation
R/W Data size select:
Reserved, undefined op-
0000:
eration
Reserved, undefined op-
0001:
eration
Reserved, undefined op-
0010:
eration
0011: 4 bits data
0100: 5 bits data
0101: 6 bits data
0110: 7 bits data
0111: 8 bits data
slave mode is selected.
29 28 27
- - -
Undefined Undefined
21 20 19
- - -
Undefined Undefined
13 12 11
SCR
0 0 0
5 4 3
FRF
0 0 0
Function
1000: 9 bits data
1001: 10 bits data
1010: 11 bits data
1011: 12 bits data
1100: 13 bits data
1101: 14 bits data
1110: 15 bits data
1111: 16 bits data
Page 312
TMPM3V6/M3V4
26 25
- -
Undefined Undefined Undefined
18 17
- -
Undefined Undefined Undefined
10 9
0 0
2 1
DSS
0 0
24
-
16
-
8
0
0
0