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11. Universal Asynchronous Receiver-Transmitter Circuit
(UART)
11.1
Outline
The universal asynchronous receiver-transmitter circuit provides the following features:
・ Transmit/receive data format
-
Data length: selectable from 5, 6, 7, or 8 bits
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With/without a parity bit
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STOP bit length: selectable from 1 bit or 2 bits
・ FIFO
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Transmission: 8-bit width/ 32-deep, reception: 12-bit width/ 32-deep
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Enable/disable decision possible
・ Interrupt function
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Multiple interrupt event outputs
-
Each interrupt can be enabled/disabled.
・ Baud-rate generator
Transmit and receive common clock can be generated from fsys.
・ 50% duty mode
-
Corresponding to the communication of the 50% duty signal.
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"0" data can be output by distributing to the two terminals alternately.
Note:"x" of pin names and registers indicates the channel number.
Page 185
TMPM3V6/M3V4
2019-02-06
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