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13.
Serial Bus Interface (I2C/SIO)
13.8
Control in SIO mode
13.8.2.2
ta is taken into the shift register from the SI pin, with the least-significant bit (LSB) first, in synchroniza-
tion with the serial clock. Once the shift register is loaded with the 8-bit data, it transfers the received da-
ta to SBIDBR and the INTSBI (buffer-full) interrupt request is generated to request reading the received da-
ta. The interrupt service program then reads the received data from SBIDBR.
the received data is read from SBIDBR.
The maximum data transfer rate varies, depending on the maximum latency between generating the inter-
rupt request and reading the received data
rupt service program. If <SIOS> is cleared, reception continues until all the bits of received data are writ-
ten to SBIDBR. The program checks SBISR<SIOF> to determine whether reception has come to an
end.<SIOF> is cleared to "0" at the end of reception. After confirming the completion of the reception,
last received data is read. If <SIOINH> is set to "1", the reception is aborted immediately and <SIOF> is
cleared to "0". (The received data becomes invalid, and there is no need to read it out.)
SBICR1
SBICR1
INTSBI interrupt
Reg.
2019-02-06
8-bit receive mode
Set the control register to the receive mode. Then writing "1" to SBICR1<SIOS> enables reception.Da-
In the internal clock mode, the serial clock will be stopped and automatically be in the wait state until
In the external clock mode, shift operations are executed in synchronization with the external clock.
Reception can be terminated by clearing <SIOS> to "0" or setting <SIOINH> to "1" in the INTSBI inter-
Note: The contents of SBIDBR will not be retained after the transfer mode is changed. The ongo-
ing reception must be completed by clearing <SIOS> to "0" and the last received data must
be read before the transfer mode is changed.
7
6
5
4
←
0
1
1
1
←
1
0
1
1
←
SBIDBR
3
2
1
0
0
X
X
X
Selects the receive mode.
0
X
X
X
Starts reception.
Reads the received data.
Page 306
TMPM3V6/M3V4
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