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13.6
Data Transfer Procedure in the I2C Bus Mode
13.6.1
Device Initialization
Firstly, set SBICR1<ACK><SCK[2:0]>. Set "1" to <ACK> to specify the acknowledgement mode. Set
"000" to SBICR1<BC[2:0]> .
Secondly, set <SA[6:0]> (a slave address) and <ALS> to SBII2CAR . (In the addressing format mode, set
<ALS>="0").
Finally, to configure the Serial Bus Interface as a slave receiver, ensure that the serial bus interface pin is
at "High" first. Then write "000" to SBICR2<MST><TRX><BB>, "1" to <PIN>, "10" to <SBIM[1:0]> and
"00" to <SWRST[1:0]>.
Note: Initialization of the serial bus interface circuit must be completed within a period that any device
does not generate start condition after all devices connected to the bus were initialized. If this rule is
not followed, data may not be received correctly because other devices may start transfer before the
initialization of the serial bus interface circuit is completed.
7
SBICR1
←
0
SBII2CAR
←
X
SBICR2
←
0
Note: X; Don't care
13.6.2
Generating the Start Condition and a Slave Address
13.6.2.1
Master mode
In the master mode, the following steps are required to generate the start condition and a slave address.
First, ensure that the bus is free (<BB> = "0"). Then, write "1" to SBICR1<ACK> to select the acknowl-
edgment mode. Write to SBIDBR a slave address and a direction bit to be transmitted.
When <BB> = "0", writing "1111" to SBICR2<MST, TRX, BB, PIN> generates the start condition on
the bus. Following the start condition, the SBI generates nine clocks from the SCL pin. The SBI outputs
the slave address and the direction bit specified at SBIDBR with the first eight clocks, and releases the
SDA line in the ninth clock to receive an acknowledgment signal from the slave device.
The INTSBI interrupt request is generated on the falling of the ninth clock, and <PIN> is cleared to
"0". In the master mode, the SBI holds the SCL line at the "Low" level while <PIN> is = "0".<TRX>
changes its value according to the transmitted direction bit at generation of the INTSBI interrupt request, pro-
vided that an acknowledgment signal has been returned from the slave device.
Note: To output salve address, check with software that the bus is free before writing to SBIDBR. If this
rule is not followed, data being output on the bus may get ruined.
6
5
4
3
2
1
0
0
0
1
0
X
X
X
X
X
X
X
X
X
X
0
0
1
1
0
0
0
Page 287
Specifies ACK and SCL clock.
Specifies a slave address and an address recognition mode.
Configures the SBI as a slave receiver.
TMPM3V6/M3V4
2019-02-06
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