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15.3.7
RMCxRCR1(Receive Control Register 1)
31
bit symbol
After reset
0
23
bit symbol
After reset
0
15
bit symbol
After reset
0
7
bit symbol
After reset
0
Bit
Bit Symbol
Type
31-24
RMCLCMAX[7:0]
R/W
23-16
RMCLCMIN[7:0]
R/W
15-8
RMCLLMAX[7:0]
R/W
7-0
RMCLLMIN[7:0]
R/W
Note: When you configure the register, you must follow the rule shown below.
30
29
28
0
0
0
22
21
20
0
0
0
14
13
12
0
0
0
6
5
4
0
0
0
Specifies a maximum cycle of leader detection.
Calculating formula of the maximum cycle: <RMCLCMAX> × 4/fs [s].
Specifies a minimum cycle of leader detection.
Calculating formula of the minimum cycle: <RMCLCMIN> × 4/fs [s].
Specifies a maximum "Low" width of leader detection.
Calculating formula of the maximum "Low" width: <RMCLLMAX> × 4/fs [s]
Specifies a minimum "Low" width of leader detection.
Calculating formula for the minimum "Low" width: <RMCLLMIN> × 4/fs [s]
When RMCxRCR2<RMCLD> = 1, a value of the "Low"-pulse width is less than the specified value,
it is defined as data bit.
Leader
<RMCLCMAX[7:0]> > <RMCLCMIN[7:0]>
"Low" width
<RMCLLMAX[7:0]> > <RMCLLMIN[7:0]>
+ "High" width
<RMCLCMIN[7:0]> > <RMCLLMAX[7:0]>
<RMCLCMAX[7:0]> > <RMCLCMIN[7:0]>
Only "High" width
<RMCLLMAX[7:0]> = 0x00
<RMCLLMIN[7:0]> = don't care
<RMCLCMAX[7:0]> = 0x00
<RMCLCMIN[7:0]> = don't care
No Leader
<RMCLLMAX[7:0]> = don't care
<RMCLLMIN[[7:0]> = don't care
Page 339
27
26
RMCLCMAX
0
0
19
18
RMCLCMIN
0
0
11
10
RMCLLMAX
0
0
3
2
RMCLLMIN
0
0
Function
Rules
TMPM3V6/M3V4
25
24
0
0
17
16
0
0
9
8
0
0
1
0
0
0
2019-02-06
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