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11.
Universal Asynchronous Receiver-Transmitter Circuit (UART)
11.3
Registers
11.3.8
UARTxLCR_H (UART Line Control Register)
Bit symbol
After reset
Bit symbol
After reset
Bit symbol
After reset
Bit symbol
After reset
Bit
Bit symbol
31-8
−
7
SPS
6-5
WLEN[1:0]
4
FEN
3
STP2
2
EPS
1
PEN
0
BRK
Note: When the contents of UARTxIBRD or UARTxFBRD are updated, UARTxLCR_H always must be writ-
2019-02-06
31
30
-
-
0
0
23
22
-
-
0
0
15
14
-
-
0
0
7
6
SPS
WLEN
0
0
Type
R
Read as "0".
R/W
Selects a stick parity
0: A stick parity is disabled.
1: When <EPS> = "0", "1" is sent/received as a parity bit.
When <EPS> = "1", "0" is sent/received as a parity bit.
<SPS> has no meaning when <PEN> is set to "0" and the parity check and generation are disabled.
For details of the truth table of <SPS>, <EPS>, and <PEN>, refer to Table 11-1.
R/W
Word length
00: 5 bits
01: 6 bits
10: 7 bits
11: 8 bits
These bits indicate the number of data bits transmitted/received in the frame.
R/W
Enables/disables the FIFO.
0: The FIFO is disabled (The FIFO becomes a 1-deep hold register.)
1: The FIFO is enabled
R/W
Selects a transmission stop bit length
0: 1 bit
1: 2 bits
In reception, a 2-bit length stop bit is not checked.
R/W
Even parity selection
0: Odd parity
1: Even parity
Controls a parity bit in transmission/reception.
When <PEN> is set to "0", if parity check and generation are disabled, this bit has no meaning.
R/W
Parity enable
0: Disabled (Parity is disabled. A parity bit is not added.)
1: Enabled (Parity check and generation are enabled.)
R/W
Enables/disables break transmission
0: No break transmission
1: Performs break transmission
When <BRK> is set to "1", "Low" level signal is output to UTxTXD output after currently ongoing transmis-
sion is complete. To establish break state, <BRK> must be keep "1" at least for two-frame transmission pe-
riod. If break state is established, the contents of the transmit FIFO is not influenced. When break state is
not transmitted, set "0" to <BRK>.
ten at the end of writing process.
29
28
27
-
-
-
0
0
0
21
20
19
-
-
-
0
0
0
13
12
11
-
-
-
0
0
0
5
4
3
FEN
STP2
0
0
0
Function
Page 194
TMPM3V6/M3V4
26
25
24
-
-
0
0
18
17
16
-
-
0
0
10
9
-
-
0
0
2
1
EPS
PEN
BRK
0
0
-
0
-
0
8
-
0
0
0
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