Toshiba TX03 Series Manual page 457

21.3 Operations
21.3.1 Basic Operation
The Watchdog timer is consists of the binary counters that work using the system clock (fsys) as an input.
Detecting time can be selected between 2
ing time as specified is elapsed, the watchdog timer interrupt (INTWDT) generates, and the watchdog timer
out pin (WDTOUT) output "Low".
To detect malfunctions (runaways) of the CPU caused by noise or other disturbances, the binary counter
of the watchdog timer should be cleared by software instruction before INTWDT interrupt generates. If the bi-
nary counter is not cleared, the non-maskable interrupt generates by INTWDT. Thus CPU detects malfunc-
tion (runway), malfunction countermeasure program is performed to return to the normal operation.
Additionally, it is possible to resolve the problem of a malfunction (runaway) of the CPU by connecting
the watchdog timer out pin to reset pins of peripheral devices.
Note: This product does not include a watchdog timer out pin (WDTOUT).
21.3.2 Operation Mode and Status
The watchdog timer begins operation immediately after a reset is cleared.
If not using the watchdog timer, it should be disabled.
The watchdog timer cannot be used as the high-speed frequency clock is stopped. Before transition to be-
low modes, the watchdog timer should be disabled.In IDLE mode, its operation depends on the WDMOD
<I2WDT> setting.
- STOP mode
- SLEEP mode
- SLOW mode
Also, the binary counter is automatically stopped during debug mode.
, 2 , 2 , 2 , 2 and 2 by the WDMOD<WDTP[2:0]>. The detect-
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TMPM3V6/M3V4
2019-02-06