16.
Analog/Digital Converter (ADC)
16.4
Register Descriptions
16.4.2
ADMOD0 (Mode Setting Register 0)
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
Bit Symbol
31-2
−
1
DACON
0
ADSS
2019-02-06
31
30
29
-
-
-
0
0
0
23
22
21
-
-
-
0
0
0
15
14
13
-
-
-
0
0
0
7
6
5
-
-
-
0
0
0
Type
R
Read as "0".
R/W
ADC operation control 1
0: Stop
1: Operate
Setting <DACON> to "1", when using the ADC.
W
Software triggered conversion
0: Don't care
1: Start
Setting <ADSS> to "1" starts AD conversion (software triggered conversion). Receiving trigger signal from
TMRB(interrupt) starts AD conversion also. For detail setting, please read the chapter about TMRB.
28
27
-
-
0
0
20
19
-
-
0
0
12
11
-
-
0
0
4
3
-
-
0
0
Function
Page 360
TMPM3V6/M3V4
26
25
24
-
-
-
0
0
0
18
17
16
-
-
-
0
0
0
10
9
8
-
-
-
0
0
0
2
1
0
-
DACON
ADSS
0
0
0