Toshiba TX03 Series Manual page 435

32 bit risc microcontroller
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17.5
Alarm function
By writing "1" to RTCPAGER<PAGE>, the alarm function of the PAGE1 registers is enabled. One of the follow-
ing three signals is output to the ALARM pin.
1. "Low" pulse (when the alarm register corresponds with the clock)
2. Outputting Low-pulse (1 Hz, 2 Hz, 4 Hz, 8 Hz or 16 Hz)
In any cases shown above, the INTRTC outputs one cycle pulse of low-speed clock. It outputs the INTRTC inter-
rupt request simultaneously.
The INTRTC interrupt signal is falling edge triggered. Specify the falling edge as the active state in the CG Inter-
rupt Mode Control Register
17.5.1
"Low" pulse (when the alarm register corresponds with the clock)
"Low" pulse is output to the ALARM pin when the values of the PAGE0 clock register and the PAGE1
alarm register correspond. The INTRTC interrupt is generated and the alarm is triggered.
The alarm settings
Initialize the alarm with alarm prohibited. Write "1" to RTCRESTR<RSTALM>.
It makes the alarm setting to be 00 minute, 00 hour, 01 day and Sunday.
Setting alarm for min., hour, date and day is done by writing data to the relevant PAGE1 register.
Enable the alarm with the RTCPAGER <ENAALM> bit. Enable the interrupt with the RTCPAGER <INTE-
NA> bit.
The following is an example program for outputting an alarm from the ALARM pin at noon (12:00) on Mon-
day 5th.
RTCPAGER
RTCRESTR
RTCDAYR
RTCDATER
RTCHOURR
RTCMINR
RTCPAGER
RTCPAGER
The above alarm works in synchronization with the low-speed clock. When the CPU is operating at high fre-
quency oscillation, a maximum of one clock delay at fs (about 30μs) may occur for the time register setting
to become valid.
7
6
5
4
3
2
0
0
0
0
1
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
1
1
Page 413
1
0
0
1
Disables alarm,sets PAGE1
0
0
Initializes alarm
0
1
Monday
0
1
5th day
1
0
Sets 12 o'clock
0
0
Sets 00 min
0
0
Enables alarm
0
0
Enables interrupts
TMPM3V6/M3V4
2019-02-06

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