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7.6.3.4
CGRSTFLG (Reset Flag Register)
31
bit symbol
-
After power-on
0
reset
23
bit symbol
-
After power-on
0
reset
15
bit symbol
-
After power-on
0
reset
7
bit symbol
-
After power-on
0
reset
Bit
Bit Symbol
Type
31-6
−
R
5
OFDRSTF
R/W
4
DBGRSTF
R/W
3
VLTDRSTF
R/W
2
WDTRSTF
R/W
1
PINRSTF
R/W
0
PONRSTF
R/W
Note 1: This flag indicates a reset generated by the <SYSRESETREQ> bit of the Application Interrupt and Reset Control
Register of the CPU's NVIC.
Note 2: This product has power-on reset circuit and this register is initialized only by power-on reset.Therefore,"1" is
set to the <PONRSTF> bit in initial reset state right after power-on.This bit is not set by the second and subse-
quent resets.
30
29
28
-
-
-
0
0
0
22
21
20
-
-
-
0
0
0
14
13
12
-
-
-
0
0
0
6
5
4
-
OFDRSTF
DBGRSTF
0
0
0
Read as 0.
OFD reset flag
0: "0" is written
1: Reset from OFD
Debug reset flag (Note1)
0: "0" is written
1: Reset from SYSRESETREQ
VLTD reset flag
0: "0" is written
1: Reset from VLTD
WDT reset flag
0: "0" is written
1: Reset from WDT
RESET pin flag
0: "0" is written
1: Reset from RESET pin.
Power On reset flag
0: "0" is written
1: Reset from Power On reset
Page 125
27
26
-
-
0
0
19
18
-
-
0
0
11
10
-
-
0
0
3
2
VLTDRSTF
WDTRSTF
PINRSTF
0
0
Function
TMPM3V6/M3V4
25
24
-
-
0
0
17
16
-
-
0
0
9
8
-
-
0
0
1
0
PONRSTF
0
1
2019-02-06
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