Option: Addressing Periphery Modules - YASKAWA VIPA System MICRO M13-CCF0000 Manual

VIPA System MICRO
Sub module Input address
DI24/DO16 136
137
Sub module Input address
Counter 816
820
824
828
Sub module Output address
DI24/DO16 136
137
Sub module Output address
Counter 816
820
824
828

4.3.3 Option: Addressing periphery modules

HB400 | CPU | M13-CCF0000 | en | 16-47
Access
BYTE
BYTE
Access
DINT
DINT
DINT
DINT
Access
BYTE
BYTE
Access
DWORD
DWORD
DWORD
DWORD
The CPU M13-CCF0000 provides an I/O area (address 0 ... 2047) and a process image
of the in- and outputs (each address default 0 ... 127). The process image stores the
signal states of the lower address (default 0 ... 127) in an additional memory area. The
size of the process image can be preset via the parameterization.
standard CPU parameters' on page 63
The process image is updated automatically when a cycle has been completed. The
process image is divided into two parts:
n process image to the inputs (PII)
n process image to the outputs (PIQ)
Deployment CPU M13-CCF0000
Addressing > Option: Addressing periphery modules
Assignment
Digital input I+0.0 ... I+0.7 (X1)
Digital input I+1.0 ... I+1.7 (X5)
Assignment
Channel 0: Counter value / Frequency value
Channel 1: Counter value / Frequency value
Channel 2: Counter value / Frequency value
Channel 3: Counter value / Frequency value
Assignment
Digital output Q+0.0 ... Q+0.7 (X2)
Digital output Q+1.0 ... Q+1.3 (X6)
Assignment
reserved
reserved
reserved
reserved
Ä Chapter 4.7 'Setting
57