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Symbol
7
6
5
TCL2
TCL27
TCL26
TCL25
8
Note f
/2
must be selected as the watch timer count clock when using a main system clock of 1.25 MHz
X
or less and the VFD controller/driver.
Caution
Changing the count clock (rewriting TCL20 to TCL22) after watchdog timer operation has
started is prohibited.
Remarks 1. f
2. f
3. x:
4. Figures in parentheses apply to operation with f
178
CHAPTER 9 WATCHDOG TIMER
Figure 9-2. Format of Timer Clock Select Register 2
4
3
2
1
TCL24
0
TCL22
TCL21
: Main system clock oscillation frequency
X
: Subsystem clock oscillation frequency
XT
don't care
User's Manual U11302EJ4V0UM
0
Address
After reset
TCL20
FF42H
00H
TCL22
TCL21
TCL20
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
TCL24 Watch timer count clock selection
8
f
/2
(19.5 kHz)
0
X
1
f
(32.768 kHz)
XT
TCL27
TCL26
TCL25
0
x
x
1
0
0
1
0
1
1
1
0
1
1
1
= 5.0 MHz or f
X
R/W
R/W
Count clock selection
Watchdog timer mode
Interval timer mode
3
4
f
/2
(625 kHz)
f
/2
(313 kHz)
X
X
4
5
f
/2
(313 kHz)
f
/2
(156 kHz)
X
X
5
6
f
/2
(156 kHz)
f
/2
(78.1 kHz)
X
X
6
7
f
/2
(78.1 kHz)
f
/2
(39.1 kHz)
X
X
7
8
f
/2
(39.1 kHz)
f
/2
(19.5 kHz)
X
X
8
9
f
/2
(19.5 kHz)
f
/2
(9.8 kHz)
X
X
9
10
f
/2
(9.8 kHz)
f
/2
(4.9 kHz)
X
X
11
12
f
/2
(2.4 kHz)
f
/2
(1.2 kHz)
X
X
Note
Buzzer output frequency selection
Buzzer output disabled
10
f
/2
(4.9 kHz)
X
11
f
/2
(2.4 kHz)
X
12
f
/2
(1.2 kHz)
X
Setting prohibited
= 32.768 kHz.
XT
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