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9.3 Watchdog Timer Control Registers
The following two registers are used to control the watchdog timer.
• Timer clock select register 2 (TCL2)
• Watchdog timer mode register (WDTM)
(1) Timer clock select register 2 (TCL2)
This register sets the watchdog timer count clock.
TCL2 is set with an 8-bit memory manipulation instruction.
RESET input sets TCL2 to 00H.
Remark
Besides setting the watchdog timer count clock, TCL2 sets the watch timer count clock and
buzzer output clock.
CHAPTER 9 WATCHDOG TIMER
User's Manual U11302EJ4V0UM
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