NEC mPD780208 Subseries User Manual page 21

Figure No.
16-12 Interrupt Request Acknowledge Processing Algorithm ................................................................. 351
16-13 Interrupt Request Acknowledgment Timing (Minimum Time) ....................................................... 352
16-14 Interrupt Request Acknowledgment Timing (Maximum Time) ...................................................... 352
16-15 Multiple Interrupt Servicing Example .............................................................................................. 354
16-16 Interrupt Request Hold .................................................................................................................... 356
16-17 Basic Configuration of Test Function ............................................................................................. 357
16-18 Format of Interrupt Request Flag Register 0H .............................................................................. 358
16-19 Format of Interrupt Mask Flag Register 0H ................................................................................... 358
17-1 Format of Oscillation Stabilization Time Select Register .............................................................. 360
17-2 HALT Mode Release by Interrupt Request Generation ................................................................ 362
17-3 HALT Mode Release by RESET Input ........................................................................................... 363
17-4 STOP Mode Release by Interrupt Request Generation ................................................................ 365
17-5 STOP Mode Release by RESET Input .......................................................................................... 366
18-1 Block Diagram of Reset Function ................................................................................................... 367
18-2 Timing of Reset by RESET Input ................................................................................................... 368
18-3 Timing of Reset due to Watchdog Timer Overflow ....................................................................... 368
18-4 Timing of Reset by RESET Input in STOP Mode .......................................................................... 368
19-1 Format of Internal Memory Size Switching Register (IMS) ........................................................... 373
19-2 Format of Internal Expansion RAM Size Switching Register ........................................................ 374
19-3 Page Program Mode Flowchart ...................................................................................................... 377
19-4 Page Program Mode Timing ........................................................................................................... 378
19-5 Byte Program Mode Flowchart ....................................................................................................... 379
19-6 Byte Program Mode Timing ............................................................................................................ 380
19-7 PROM Read Timing ........................................................................................................................ 381
B-1 Configuration of Development Tools .............................................................................................. 400
B-2 EV-9200GF-100 Package Drawing (for Reference Purposes only) ............................................. 409
B-3 Recommended Footprint for EV-9200GF-100 (for Reference Purposes only) ............................ 410
B-4 Distance Between IE System and Conversion Adapter ................................................................ 411
B-5 Connection Conditions of Target System (When NP-100GF-TQ Is Used) .................................. 412
B-6 Connection Conditions of Target System (When NP-H100GF-TQ Is Used) ............................... 412
LIST OF FIGURES (6/6)
Title
User's Manual U11302EJ4V0UM
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21