External Event Counter Operation - NEC mPD780208 Subseries User Manual

(2) Pulse width measurement by means of restart
When input of a valid edge to the TI0/P00 pin is detected, the count value of the 16-bit timer register (TM0) is
taken into the 16-bit capture register (CR01), and then the pulse width of the signal input to the TI0/P00 pin is
measured by clearing TM0 and restarting the count.
The edge specification can be selected from three types—rising, falling, and both edges—by using bits 2 and
3 (ES10 and ES11) of the external interrupt mode register (INTM0).
For valid edge detection, sampling is performed at the interval selected by the sampling clock select register
(SCS), and a capture operation is only performed when a valid level is detected twice, thus eliminating noise with
a short pulse width.
Figure 6-16. Timing of Pulse Width Measurement Operation by Means of Restart
Count clock
TM0 count value
TI0 pin input
CR01 captured value
INTP0

6.5.4 External event counter operation

The external event counter counts the number of external clock pulses input to the TI0/P00 pin using the 16-bit
timer register (TM0).
TM0 is incremented each time the valid edge specified by the external interrupt mode register (INTM0) is input.
When the TM0 count value matches the 16-bit compare register (CR00) value, TM0 is cleared to 0 and the interrupt
request signal (INTTM0) is generated.
Set CR00 to a value other than 0000H (a 1-pulse count operation cannot be performed).
The rising edge, falling edge or both edges can be selected using bits 2 and 3 (ES10 and ES11) of INTM0.
For valid edge detection, sampling is performed at the interval selected by the sampling clock select register (SCS),
and a counter operation is only performed when a valid level is detected twice, thus eliminating noise with a short
pulse width.
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CHAPTER 6 16-BIT TIMER/EVENT COUNTER
(with Both Edges Specified)
t
0000 0001 D0 0000 0001
(D0 + 1) x t
User's Manual U11302EJ4V0UM
D0
(D1 + 1) x t
D1 0000 0001
D1