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(c) Repeat transmission mode
In this mode, data stored in the buffer RAM is transmitted repeatedly.
Serial transfer is started by writing any data to serial I/O shift register 1 (SIO1) while bit 7 (CSIE1)
of serial operating mode register 1 (CSIM1) is set to 1.
Unlike the basic transmission mode, after the last byte (data in address FAC0H) has been transmitted,
the interrupt request flag (CSIIF1) is not set, the value at the time the transmission was started is
set in the automatic data transmit/receive address pointer (ADTP) again, and the buffer RAM contents
are transmitted again.
When a reception operation, busy control, and strobe control are not performed, the P20/SI1, P23/
STB, and P24/BUSY pins can be used as normal I/O ports.
The repeat transmission mode operation timing is shown in Figure 14-14, and the operation flowchart
in Figure 14-15. The operation of the buffer RAM to transmit 6-byte data in repeat transmission mode
is shown in Figure 14-16.
Figure 14-14. Repeat Transmission Mode Operation Timing
SCK1
D7 D6 D5 D4 D3 D2 D1 D0
SO1
Caution Since, in the repeat transmission mode, a read is performed on the buffer RAM after
the transmission of one byte, the interval is included in the period up to the next
transmission.
processing, the maximum interval is dependent upon the CPU operation and the value
of the automatic data transmit/receive interval specification register (ADTI) (see (5)
Automatic transmit/receive interval).
CHAPTER 14 SERIAL INTERFACE CHANNEL 1
Interval
As the buffer RAM read is performed at the same time as CPU
User's Manual U11302EJ4V0UM
D7 D6 D5 D4 D3 D2 D1 D0
Interval
D7 D6 D5
287
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