Relationship Between Cpu Clock And Minimum Instruction Execution Time - NEC mPD780208 Subseries User Manual

The fastest instruction of the µ PD780208 Subseries is executed in two CPU clocks. Therefore, the relationship
between the CPU clock (f
Table 5-2. Relationship Between CPU Clock and Minimum Instruction Execution Time
f
X
f /2
X
2
f /2
X
f /2 3
X
f /2 4
X
f /2
XT
f = 5.0 MHz, f
X
f : Main system clock oscillation frequency
X
f : Subsystem clock oscillation frequency
XT
(2) Display mode register 0 (DSPM0)
This register sets the mode for the noise eliminator of the subsystem clock.
DSPM0 is set with an 8-bit memory manipulation instruction.
Only bit 7 (KSF) can be read with a 1-bit memory manipulation instruction.
RESET input sets DSPM0 to 00H.
Remark In addition to the function mentioned above, DSPM0 can also set the number of display segments/
total number of display outputs, display mode, and display key scan timing.
104
CHAPTER 5 CLOCK GENERATOR
) and minimum instruction execution time is as shown in Table 5-2.
CPU
CPU Clock (f ) Minimum Instruction Execution Time: 2/f
CPU
0.4 µ s
0.8 µ s
1.6 µ s
3.2 µ s
6.4 µ s
122 µ s
= 32.768 kHz
XT
User's Manual U11302EJ4V0UM
CPU