NEC mPD780208 Subseries User Manual page 210

(6) Interrupt request signal generator
This circuit controls interrupt request signal generation. It generates an interrupt request signal in the
following cases.
• In the 3-wire serial I/O mode and 2-wire serial I/O mode
This circuit generates an interrupt request signal every eight serial clocks.
• In the SBI mode
When WUP Note
When WUP Note
Note WUP is the wakeup function specification bit. It is bit 5 of serial operating mode register 0 (CSIM0).
To use the wakeup function (WUP = 1), clear bit 5 (SIC) of the interrupt timing specification register
(SINT) to 0.
(7) Busy/acknowledge output circuit and bus release/command/acknowledge detector
These two circuits output and detect various control signals in the SBI mode.
These do not operate in the 3-wire serial I/O mode and 2-wire serial I/O mode.
(8) P27 output latch
This latch generates a serial clock by software at the end of eight serial clocks.
When using serial interface channel 0, set the P27 output latch to 1.
RESET input sets the latch to 0.
210
CHAPTER 13 SERIAL INTERFACE CHANNEL 0
is 0 ....... Generates an interrupt request signal every eight serial clocks.
is 1 ....... Generates an interrupt request signal when the serial I/O shift register 0
(SIO0) value matches the slave address register (SVA) value after address
reception.
User's Manual U11302EJ4V0UM