Clock Switching Flowchart And Register Setting; Switching From Ring-Osc Clock To High-Speed System Clock - NEC 78K0/KB1+ Preliminary User's Manual

5.8 Clock Switching Flowchart and Register Setting

5.8.1 Switching from Ring-OSC clock to high-speed system clock

Figure 5-15. Switching from Ring-OSC Clock to High-Speed System Clock (Flowchart)
Register initial
value after reset
clock oscillation stabilization
Ring-OSC clock
time has not elapsed
operation
clock operation
(dividing set PCC)
High-speed system
clock operation
Note Check the oscillation stabilization wait time of the high-speed system clock oscillator after reset release
using the OSTC register and then switch to the high-speed system clock operation after the oscillation
stabilization wait time has elapsed. Waiting for the oscillation stabilization time is not required when the
external RC oscillation clock is selected as the high-speed system clock by the option byte. Therefore, the
CPU clock can be switched without reading the OSTC value. The OSTS register setting is valid only after
STOP mode is released by interrupt during high-speed system clock operation.
CHAPTER 5 CLOCK GENERATOR
After reset release
PCC = 00H
RCM = 00H
MCM = 00H
MOC = 00H
OSTC = 00H
OSTS = 05H
Each processing
OSTC check
High-speed system
PCC setting
Ring-OSC
MCM.0 ← 1
High-speed system clock operation
Preliminary User's Manual U16846EJ1V0UD
; f = f
CPU R
; Ring-OSC oscillation
; Ring-OSC clock operation
; High-speed system clock oscillation
Note
; Oscillation stabilization time status register
; Oscillation stabilization time f
Note
; High-speed system clock oscillation
stabilization time status check
High-speed system clock oscillation stabilization time
has elapsed
MCM.1 (MCS) is changed from 0 to 1
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