Overview Of Functions - NEC mPD780208 Subseries User Manual

1.8 Overview of Functions

Item
ROM
Internal
memory
High-speed RAM
Expansion RAM
Buffer RAM
VFD display RAM
General-purpose registers
Minimum
With main system
instruction clock selected
execution
With subsystem
time
clock selected
Instruction set
I/O ports (including VFD pins)
VFD controller/driver
A/D converter
Serial interface
Notes 1. The initial value of the internal memory size switching register (IMS) in the µ PD780204A and 780205A
is fixed to CFH (60 KB), regardless of the internal memory capacity. Therefore, set the values shown
below for each product before use.
µ PD780204A: C8H (32 KB)
µ PD780205A: CAH (40 KB)
2. 32, 40, 48, or 60 KB can be selected by the internal memory size switching register (IMS).
3. 0 or 1024 bytes can be selected by the internal expansion RAM size switching register (IXS).
32
CHAPTER 1 OUTLINE
µ PD780204
Part Number
µ PD780204A
Mask ROM
32 KB Note 1
1024 bytes
64 bytes
80 bytes
8 bits x 8 x 4 banks
0.4 µ s/0.8 µ s/1.6 µ s/3.2 µ s/6.4 µ s (when operated at 5.0 MHz)
122 µ s (when operated at 32.768 kHz)
• 16-bit operation
Multiply/divide (8 bits x 8 bits, 16 bits ÷ 8 bits)
•
• Bit manipulation (set, reset, test, and Boolean operation)
• BCD adjust, and other related operations
Total:
• CMOS input:
• CMOS I/O:
• N-ch open-drain I/O:
• P-ch open-drain I/O:
• P-ch open-drain output: 16 pins
Total of display output:
• Segments:
• Digits:
• 8-bit resolution x 8 channels
• Power supply voltage: AV
• 3-wire serial I/O/SBI/2-wire serial I/O mode selection
possible:
• 3-wire serial I/O mode (maximum 64-byte on-chip automatic
transmit/receive function): 1 channel
User's Manual U11302EJ4V0UM
µ PD780206
µ PD780205
µ PD780205A
40 KB Note 1 48 KB
– 1024 bytes
74 pins
2 pins
27 pins
5 pins
24 pins
53 pins
9 to 40 pins
2 to 16 pins
= 4.0 to 5.5 V
DD
1 channel
µ PD780208 µ PD78P0208
One-time
PROM
60 KB 60 KB Note 2
Note 3
1024 bytes