Bus Release Signal - NEC mPD780208 Subseries User Manual

(a) Bus release signal (REL)
The bus release signal is identified when the SB0 (SB1) line has changed from low level to high level while
the SCK0 line is high level (without serial clock output).
This signal is output by the master device.
The bus release signal indicates that the master device is going to transmit an address to the slave device.
The slave device incorporates hardware to detect the bus release signal.
Caution If the SB0 (SB1) line changes from low level to high level while the SCK0 line is high
level, it is recognized as a bus release signal. Therefore, if the changing timing of
the bus fluctuates because of substrate capacitance, etc., it may be recognized as
a bus release signal even while data is being transmitted. Care should therefore
be taken in the wiring.
(b) Command signal (CMD)
The command signal is identified when the SB0 (SB1) line has changed from high level to low level while
the SCK0 line is high level (without serial clock output). This signal is output by the master device.
The command signal indicates that from this point, the master will send a command to the slave (however,
command signals following bus release signals indicate that an address will be sent).
The slave incorporates hardware to detect command signals.
Caution If the SB0 (SB1) line changes from high level to low level while the SCK0 line is high
level, it is recognized as a command signal. Therefore, if the changing timing of
the bus fluctuates because of substrate capacitance, etc., it may be recognized as
a command signal even while data is being transmitted. Care should therefore be
taken in the wiring.
CHAPTER 13 SERIAL INTERFACE CHANNEL 0
Figure 13-11. Bus Release Signal
"H"
SCK0
SB0 (SB1)
Figure 13-12. Command Signal
"H"
SCK0
SB0 (SB1)
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