P100 To P107 (Port 10); P110 To P117 (Port 11); P120 To P127 (Port 12); Fip0 To Fip12 - NEC mPD780208 Subseries User Manual

2.2.8 P100 to P107 (Port 10)

These pins constitute an 8-bit I/O port. Besides serving as I/O port pins, they function as display outputs for the
VFD controller/driver.
Port 10 can drive LEDs directly.
The following operating modes can be specified in 1-bit units.
(1) Port mode
P100 to P107 function as an 8-bit I/O port. They can be specified in input or output mode in 1-bit units using
port mode register 10 (PM10).
P100 to P107 are P-ch open-drain outputs. In mask ROM versions, use of pull-down resistors can be specified
with the mask option.
(2) Control mode
P100 to P107 function as display output pins for the VFD controller/driver (FIP29 to FIP36).

2.2.9 P110 to P117 (Port 11)

These pins constitute an 8-bit I/O port. Besides serving as I/O port pins, they function as display outputs for the
VFD controller/driver.
Port 11 can drive LEDs directly.
The following operating modes can be specified in 1-bit units.
(1) Port mode
P110 to P117 function as an 8-bit I/O port. They can be specified in input or output mode in 1-bit units using
port mode register 11 (PM11).
P110 to P117 are P-ch open-drain outputs. In mask ROM versions, use of pull-down resistors can be specified
with the mask option.
(2) Control mode
P110 to P117 function as display output pins for the VFD controller/driver (FIP37 to FIP44).

2.2.10 P120 to P127 (Port 12)

These pins constitute an 8-bit I/O port. Besides serving as I/O port pins, they function as display outputs for the
VFD controller/driver.
Port 12 can drive LEDs directly.
The following operating modes can be specified in 1-bit units.
(1) Port mode
P120 to P127 function as an 8-bit I/O port. They can be specified in input or output mode in 1-bit units using
port mode register 12 (PM12).
P120 to P127 are P-ch open-drain outputs. In mask ROM versions, use of pull-down resistors can be specified
with the mask option.
(2) Control mode
P120 to P127 function as display output pins for the VFD controller/driver (FIP45 to FIP52).

2.2.11 FIP0 to FIP12

These are display output pins for the VFD controller/driver.
FIP0 to FIP12 are P-ch open-drain outputs. In mask ROM versions, use of pull-down resistors can be specified
with the mask option. The µ PD78P0208 contains pull-down resistors at FIP0 to FIP12 (connected to V
CHAPTER 2 PIN FUNCTIONS
User's Manual U11302EJ4V0UM
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