Chapter 3 Cpu Architecture; Memory Space; Memory Map ( Μ Pd780204 And Μ Pd780204A) - NEC mPD780208 Subseries User Manual

3.1 Memory Space

Each product of the µ PD780208 Subseries accesses a memory space of 64 KB. Figures 3-1 to 3-5 show memory
maps.
Caution The initial values of the internal memory size switching register (IMS) in the µ PD780204A,
780205A, and 78P0208 are fixed to CFH, regardless of the internal memory capacity. Therefore,
set the values shown below for each product before use.
µ PD780204A: C8H
µ PD780205A: CAH
µ PD78P0208: Value corresponding to mask ROM version
FFFFH
FF00H
FEFFH
FEE0H
FEDFH
FB00H
FAFFH
Data memory
space FAC0H
FABFH
FA80H
FA7FH
FA30H
FA2FH
8000H
7FFFH
Program
memory
space
0000H
48

CHAPTER 3 CPU ARCHITECTURE

Figure 3-1. Memory Map ( µ PD780204 and µ PD780204A)
Special-function
registers (SFRs)
256 x 8 bits
General-purpose
registers
32 x 8 bits
Internal high-speed RAM
1024 x 8 bits
Buffer RAM
64 x 8 bits
Reserved
VFD display RAM
80 x 8 bits
Reserved
Internal ROM
32768 x 8 bits
User's Manual U11302EJ4V0UM
7FFFH
Program area
1000H
0FFFH
CALLF entry area
0800H
07FFH
Program area
0080H
007FH
CALLT table area
0040H
003FH
Vector table area
0000H