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(3) MSB/LSB switching as the start bit
In the 3-wire serial I/O mode, transfer can be selected to start from the MSB or LSB.
Figure 14-7 shows the configuration of serial I/O shift register 1 (SIO1) and the internal bus. As shown
in the figure, the MSB/LSB can be read/written in reverse form.
MSB/LSB switching as the start bit can be specified using bit 6 (DIR) of serial operating mode register
1 (CSIM1).
Figure 14-7. Circuit for Switching Transfer Bit Order
Internal bus
LSB-first
MSB-first
SI1
SO1
SCK1
Start bit switching is realized by switching the bit order for data write to SIO1. The SIO1 shift order remains
unchanged.
Thus, switching between MSB-first and LSB-first must be performed before writing data to the shift
register.
(4) Transfer start
Serial transfer is started by setting transfer data to serial I/O shift register 1 (SIO1) when the following
two conditions are satisfied.
• Serial interface channel 1 operation control bit (CSIE1) = 1
• Internal serial clock is stopped or SCK1 is at high level after 8-bit serial transfer.
Caution
If CSIE1 is set to "1" after data write to SIO1, transfer does not start.
Upon termination of 8-bit transfer, serial transfer automatically stops and the interrupt request flag
(CSIIF1) is set.
CHAPTER 14 SERIAL INTERFACE CHANNEL 1
7
6
1
0
Read/write gate
Shift register 1 (SIO1)
User's Manual U11302EJ4V0UM
Read/write gate
SO1 latch
D
Q
271
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