Display Mode And Display Output - NEC mPD780208 Subseries User Manual

15.5 Display Mode and Display Output

The on-chip VFD controller/driver assigns pins FIP0 to FIP52/P127 to digit signals and segment signals (in this
order). The number assigned is specified by display mode registers 0 and 1 (DSPM0 and DSPM1). The remaining
pins are assigned as general-purpose ports.
The pin configuration for a 14-segment display is shown below as an example.
Pin name
Display stop
FIP0 FIP0
FIP1 FIP1
FIP2 FIP2
FIP3 FIP3
FIP4 FIP4
FIP5 FIP5
FIP6 FIP6
FIP7 FIP7
FIP8 FIP8
FIP9 FIP9
FIP10 FIP10
FIP11 FIP11
FIP12 FIP12
FIP13/P80 P80
FIP14/P81 P81
FIP15/P82 P82
FIP16/P83 P83
FIP17/P84 P84
FIP18/P85 P85
FIP19/P86 P86
FIP20/P87 P87
FIP21/P90 P90
FIP22/P91 P91
FIP23/P92 P92
FIP24/P93 P93
FIP25/P94 P94
FIP26/P95 P95
FIP27/P96 P96
FIP28/P97 P97
FIP29/P100 P100
FIP30/P101 P101
FIP31/P102 P102
FIP51/P126 P126
FIP52/P127 P127
Remark T0 to T15: Display digit pins
S0 to S13: Segment pins
312
CHAPTER 15 VFD CONTROLLER/DRIVER
Figure 15-9. Pin Configuration for 14-Segment Display
Number of display digits selected
2 3
T0 T0
T1 T1
S0 T2
S1 S0
S2 S1
S3 S2
S4 S3
S5 S4
S6 S5
S7 S6
S8 S7
S9 S8
S10 S9
S11 S10
S12 S11
S13 S12
P83 S13
P84 P84
P85 P85
P86 P86
P87 P87
P90 P90
P91 P91
P92 P92
P93 P93
P94 P94
P95 P95
P96 P96
P97 P97
P100 P100
P101 P101
P102 P102
P126 P126
P127 P127
User's Manual U11302EJ4V0UM
...............
4 14
T0 T0
T1 T1
T2 T2
T3 T3
S0 T4
S1 T5
S2 T6
S3 T7
S4 T8
S5 T9
S6 T10
S7 T11
S8 T12
S9 T13
S10 S0
...............
S11 S1
S12 S2
S13 S3
P85 S4
P86 S5
P87 S6
P90 S7
P91 S8
P92 S9
P93 S10
P94 S11
P95 S12
P96 S13
P97 P97
P100 P100
P101 P101
P102 P102
P126 P126
P127 P127
15 16
T0 T0
T1 T1
T2 T2
T3 T3
T4 T4
T5 T5
T6 T6
T7 T7
T8 T8
T9 T9
T10 T10
T11 T11
T12 T12
T13 T13
T14 T14
S0 T15
S1 S0
S2 S1
S3 S2
S4 S3
S5 S4
S6 S5
S7 S6
S8 S7
S9 S8
S10 S9
S11 S10
S12 S11
S13 S12
P100 S13
P101 P101
P102 P102
P126 P126
P127 P127