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16.4.4 Multiple interrupt servicing
Multiple interrupt servicing occurs when an interrupt request is acknowledged during execution of another interrupt.
Multiple interrupt servicing does not occur unless the interrupt request acknowledgment enabled state is selected
(IE = 1) (except non-maskable interrupts). Also, when an interrupt request is received, interrupt request acknowledgment
becomes disabled (IE = 0). Therefore, to enable multiple interrupt servicing, it is necessary to set (to 1) the IE flag
with the EI instruction during interrupt servicing to enable interrupt acknowledgment.
Moreover, even if interrupts are enabled, multiple interrupt servicing may not be enabled, this being subject to
interrupt priority control. Two types of priority control are available: default priority control and programmable priority
control. Programmable priority control is used for multiple interrupt servicing.
In the interrupt enabled state, if an interrupt request with a priority equal to or higher than that of the interrupt
currently being serviced is generated, it is acknowledged for multiple interrupt servicing. If an interrupt with a priority
lower than that of the interrupt currently being serviced is generated during interrupt servicing, it is not acknowledged
for multiple interrupt servicing.
Interrupt requests that are not enabled because the interrupt disabled state is set or they have a lower priority are
held pending. When servicing of the current interrupt ends, the pending interrupt request is acknowledged following
execution of one main processing instruction.
Multiple interrupt servicing is not possible during non-maskable interrupt servicing.
Table 16-4 shows interrupt requests enabled for multiple interrupt servicing, and Figure 16-15 shows multiple
interrupt servicing examples.
Table 16-4. Interrupt Request Enabled for Multiple Interrupt During Interrupt Servicing
Multiple Interrupt
Servicing Request
Interrupt Servicing
Non-maskable interrupt
Maskable interrupt
Software interrupt
Remarks 1. E: Multiple interrupt servicing enabled
D: Multiple interrupt servicing disabled
2. ISP and IE are flags contained in the PSW.
ISP = 0: An interrupt with higher priority is being serviced
ISP = 1: An interrupt request is not acknowledged or an interrupt with lower priority is being
IE = 0:
IE = 1:
3. ××PR is a flag contained in PR0L and PR0H.
××PR = 0: Higher priority level
××PR = 1: Lower priority level
CHAPTER 16 INTERRUPT AND TEST FUNCTIONS
Non-Maskable
Interrupt
Request
IE = 1
D
ISP = 0
E
ISP = 1
E
E
serviced
Interrupt request acknowledgment is disabled
Interrupt request acknowledgment is enabled
User's Manual U11302EJ4V0UM
Maskable Interrupt Request
××PR = 0
××PR = 1
IE = 0
IE = 1
D
D
D
E
D
D
E
D
E
E
D
E
Software
Interrupt
Request
IE = 0
D
E
D
E
D
E
D
E
353
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