NEC mPD780208 Subseries User Manual page 19

Figure No.
13-16 Data .................................................................................................................................................. 229
13-17 Acknowledge Signal ........................................................................................................................ 230
13-18 BUSY and READY Signals ............................................................................................................. 231
13-19 RELT, CMDT, RELD, and CMDD Operations (Master) ................................................................ 236
13-20 RELD and CMDD Operations (Slave) ............................................................................................ 236
13-21 ACKT Operation .............................................................................................................................. 237
13-22 ACKE Operations ............................................................................................................................ 238
13-23 ACKD Operations ............................................................................................................................ 239
13-24 BSYE Operation .............................................................................................................................. 239
13-25 Pin Configuration ............................................................................................................................. 242
13-26 Address Transmission from Master Device to Slave Device (WUP = 1) ..................................... 244
13-27 Command Transmission from Master Device to Slave Device .................................................... 245
13-28 Data Transmission from Master Device to Slave Device .............................................................. 246
13-29 Data Transmission from Slave Device to Master Device .............................................................. 247
13-30 Serial Bus Configuration Example Using 2-Wire Serial I/O Mode ................................................ 249
13-31 2-Wire Serial I/O Mode Timing ....................................................................................................... 253
13-32 RELT and CMDT Operations .......................................................................................................... 254
13-33 SCK0/P27 Pin Configuration .......................................................................................................... 255
14-1 Block Diagram of Serial Interface Channel 1 ................................................................................ 258
14-2 Format of Timer Clock Select Register 3 ....................................................................................... 261
14-3 Format of Serial Operating Mode Register 1 ................................................................................. 262
14-4 Format of Automatic Data Transmit/Receive Control Register ..................................................... 264
14-5 Format of Automatic Data Transmit/Receive Interval Specification Register .............................. 265
14-6 3-Wire Serial I/O Mode Timing ....................................................................................................... 270
14-7 Circuit for Switching Transfer Bit Order ......................................................................................... 271
14-8 Basic Transmission/Reception Mode Operation Timing ............................................................... 279
14-9 Basic Transmission/Reception Mode Flowchart ............................................................................ 280
14-10 Buffer RAM Operation in 6-Byte Transmission/Reception
(in Basic Transmission/Reception Mode) ....................................................................................... 281
14-11 Basic Transmission Mode Operation Timing ................................................................................. 283
14-12 Basic Transmission Mode Flowchart .............................................................................................. 284
14-13 Buffer RAM Operation in 6-Byte Transmission (in Basic Transmission Mode) ........................... 285
14-14 Repeat Transmission Mode Operation Timing .............................................................................. 287
14-15 Repeat Transmission Mode Flowchart ........................................................................................... 288
14-16 Buffer RAM Operation in 6-Byte Transmission (in Repeat Transmission Mode) ........................ 289
14-17 Automatic Transmission/Reception Suspension and Restart ....................................................... 291
14-18 System Configuration with Busy Control Option ........................................................................... 292
14-19 Operation Timing When Using Busy Control Option (BUSY0 = 0) .............................................. 293
14-20 Busy Signal and Clearing Wait (BUSY0 = 0) ................................................................................ 293
14-21 Operation Timing When Using Busy & Strobe Control Option (BUSY0 = 0) ............................... 294
14-22 Operation Timing of Bit Slippage Detection Function Using Busy Signal (BUSY0 = 1) ............. 295
14-23 Automatic Transmit/Receive Interval .............................................................................................. 296
14-24 Operation Timing When Automatic Transmit/Receive Function Is Operating with
Internal Clock ................................................................................................................................... 297
LIST OF FIGURES (4/6)
Title
User's Manual U11302EJ4V0UM
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19