Xadc Analog-To-Digital Converter - Xilinx ZC706 User Manual

AA19 respectively, enabling the user to implement their own fan speed control IP in the
AP SoC PL logic.
More information about the power system components used by the ZC706 evaluation
board are available from the Texas Instruments digital power website

XADC Analog-to-Digital Converter

[Figure 1-2, callout 33]
The XC7Z045 AP SoC provides an Analog Front End XADC block. The XADC block includes
a dual 12-bit, 1 MSPS Analog-to-Digital Convertor (ADC) and on-chip sensors. See 7 Series
FPGAs and Zynq-7000 All Programmable SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital
Converter User Guide (UG480)for details on the capabilities of the analog front end.
Figure 1-37 shows the XADC block diagram.
X-Ref Target - Figure 1-37
U1
XC7Z020
Dual Use IO
(Analog/Digital)
100Ω
VAUX0P
1 nF
VAUX0N
To
100Ω
Header
J63 100Ω
VAUX8P
1 nF
VAUX8N
100Ω
ZC706 Evaluation Board User Guide
UG954 (v1.5) September 10, 2015
AP SoC
To J54
XADC_VCC
VCCADC
100 nF
Close to
Package Pins
XADC_AGND
GNDADC
XADC_AGND
XADC_VREF (1.25V)
J52
1
XADC_VREFP
2
V REFP
100 nF
3
Close to
Package Pins
V REFN
100Ω
V P
1 nF
V N
100Ω
DXP
DXN
Figure 1-37: XADC Block Diagram
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VCCAUX
Ferrite Bead
1 J53
XADC_VCC Header J40
2
1.8V 150 mV max
U14
ADP123
3
Out In
Gnd
10 μF
XADC_AGND
U38
To Header J63
REF3012
Out In
Gnd
10 μF
Ferrite Bead
XADC_AGND
XADC_AGND
Star Grid
Connection
To
Header
J63
Feature Descriptions
[Ref 32].
XADC_VCC5V0 To Header J63
Ferrite Bead
J14
10 μF
J54
1
2
3
XADC_VCC
J13
GND
J12
UG8954_c1_37_041715
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VCC5V0
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