Xilinx’s limited warranty, please refer to Xilinx’s Terms of Sale which can be viewed at https://www.xilinx.com/legal.htm#tos; IP cores may be subject to warranty and support terms contained in a license issued to you by Xilinx. Xilinx products are not designed or intended to be fail-safe or for use in any application requiring fail-safe performance;...
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GND changed to GA0 = 0 = GND in Table 1-28 Table 1-29. The Appendix C Master UCF Listing was replaced with the Xilinx Design Constraints (XDC) file listing. The link in Declaration of Conformity was updated. 04/30/2015 Description added to FMC Connector JTAG Bypass.
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Xilinx Design Constraints, the constraints file list is removed, and access instructions are added. Updated Appendix E, Regulatory and Compliance Information. Corrected the v1.6.1 revision history date to 06/29/2018. ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
Other features can be supported using VITA-57 FPGA mezzanine cards (FMC) attached to either of two low pin count (LPC) FMC connectors. ZC702 Board Features The ZC702 board features are listed in here. Detailed information for each feature is provided in Feature Descriptions.
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Power on/off slide switch • Power management with PMBus voltage and current monitoring via TI power controllers • Dual 12-bit 1 MSPS XADC analog-to-digital front end • Configuration options: ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
Put the adapter down only on an antistatic surface such as the bag supplied in your kit. • If you are returning the adapter to Xilinx Product Support, place it back in its antistatic bag immediately. ZC702 Board User Guide www.xilinx.com...
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Round callout references a component Square callout references a component on the front side of the board on the back side of the board UG850_c1_02_032013 Figure 1-2: ZC702 Board Component Locations Table 1-1: ZC702 Board Component Descriptions Schematic Reference Callout...
Zynq-7000 XC7Z020 SoC [Figure 1-2, callout 1] The ZC702 board is populated with the Zynq-7000 XC7Z020-1CLG484C SoC. The XC7Z020 SoC consists of an SoC-style integrated processing system (PS) and programmable logic (PL) on a single die. The high-level block diagram is shown in Figure 1-3.
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For additional information on Zynq-7000 SoC devices, see the Zynq-7000 SoC Data Sheet: Overview (DS190) [Ref 1] and the Zynq-7000 SoC Technical Reference Manual (UG585) [Ref 2] for more information about Zynq-7000 SoC configuration options. ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
PL must be powered on to enable the use of the security block located within the PL, which provides 256-bit AES and SHA decryption/authentication. The ZC702 board supports these configuration options: • PS Configuration: Quad SPI flash memory •...
Datapath width: 32 bits • Data rate: Up to 1,333 MT/s The ZC702 XC7Z020 SoC PS DDR bank 502 interface performance is documented in the Zynq-7000 SoC (Z-7007S, Z-7012S, Z-7014S, Z-7010, Z-7015, and Z-7020): DC and AC Switching Characteristics (DS187) data sheet [Ref The DDR3 0.75V V...
U66, U67, U68, U69 PS_VRN PS_VRP VTTVREF_PS VTTVREF_PS The ZC702 DDR3 4x 8-bit component memory interface adheres to the constraints guidelines Note: documented in the DDR3 Design Guidelines section of the 7 Series FPGAs Memory Interface Solutions v1.8 User Guide (UG586) [Ref 4].
[Ref 2] provides details on using the Quad-SPI flash memory. Figure 1-6 shows the connections of the linear Quad SPI flash memory on the ZC702 board. For more details, see the Micron N25Q128A11ESF40G data sheet at the Micron website [Ref 14].
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USB Connector USB3320 (U9) Net Name Description Name VBUS USB_VBUS_SEL +5V from host system USB_D_N Bidirectional differential serial data (N-side) USB_D_P Bidirectional differential serial data (P-side) Signal ground ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
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Mini-B connector (J1) can be tied to GND by a jumper on header J36 pins 1–2 (default). The USB shield can optionally be connected through a capacitor to GND by installing a capacitor (body size 0402) at location C202 and jumping pins 2-3 on header J36. ZC702 Board User Guide www.xilinx.com Send Feedback...
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2-3 = HOST OR OTG MODE VCC3V3 R280 USB HOST POWER 1/10Ω MIC2025_SOP8 VCC5V0 OUT2 OUT1 C293 LED-RED-SMT 0.1μF 150μF SOP127P500X600_8 TANT UG850_c1_07_032719 Figure 1-7: USB 2.0 ULPI Transceiver ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
[Figure 1-2, callout 5] The ZC702 board includes a secure digital input/output (SDIO) interface to provide user-logic access to general purpose nonvolatile SDIO memory cards and peripherals. Information for the SD I/O card specification can be found at the SanDisk Corporation...
TDI-to-TDO connection using a device or bypass jumper to ensure that the JTAG chain connects to the XC7Z020 SoC. Clock Generation The ZC702 board provides three clock sources for the XC7Z020 SoC. Table 1-11 lists the source devices for each clock.
156.250 MHz. User applications can change the output frequency within the range of 10 MHz to 810 MHz through an I2C interface. Power cycling the ZC702 board reverts the user clock to the default frequency of 156.250 MHz. •...
[Figure 1-2, callout 9] The ZC702 board uses the Marvell Alaska PHY device (88E1116R) at U35 for Ethernet communications at 10 Mb/s, 100 Mb/s, or 1000 Mb/s. The board supports RGMII mode only. The PHY connection to a user-provided Ethernet cable is through a Halo HFJ11-1G01E RJ-45 connector (P2) with built-in magnetics.
USB port. The USB cable is supplied in the ZC702 Evaluation Kit (Standard-A end to host computer, Type Mini-B end to ZC702 board connector J17). The CP2103GM is powered by the USB 5V provided by the host PC when the USB cable is plugged into the USB port on the ZC702 board.
[Figure 1-2, callout 13] The ZC702 board provides a high-definition multimedia interface (HDMI®) video output using an Analog Devices ADV7511KSTZ-P HDMI transmitter at U40. The HDMI output is provided on a Molex 500254-1927 HDMI type-A receptacle at P1. The ADV7511 supports 1080P 60Hz, YCbCr 4:2:2 encoding via 16-bit input data mapping.
[Figure 1-2, callout 14] The ZC702 board implements a single I2C port on the XC7Z020 SoC (IIC_SDA_MAIN, IIC_SDA_SCL), which is routed through an TI Semiconductor PCA9548 1-to-8 channel I2C bus switch (U44). The bus switch can operate at speeds up to 400 kHz.
Clock counter, alarm and fixed-cycle timer interrupt functions Programming information for the RTC-8564JE is available in the RTC-8564JE/NB Application Manual at the Epson Electronics America website [Ref 22]. ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
The 2 x 6 I/O expansion header J54 supports Digilent Pmod Peripheral Modules. 8 pins (IIC_PMOD[0:7]) are connected to the TI TCA6416APWR I2C expansion port device U80. See the Digilent website for information on Digilent Pmod Peripheral Modules [Ref 23]. ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
The TJA1040 (U14) is an advanced high speed Controller Area Network (CAN) transceiver for use in automotive and general industrial applications. It supports the differential bus signal representation described in the international standard for in-vehicle high speed CAN applications (ISO 11898). ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
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Table 1-21: CAN Transceiver SoC Connections TJA1040 (U14) TXS0104E Level Shifter (U3) XC7Z020 SoC (U1) Net Name Net Name Low Side Net Bank CAN_TXD CAN_TXD_LS PS_MIO47 CAN_RXD CAN_RXD_LS PS_MIO46 CAN_STB_B CAN_STB_B_LS PS_MIO9 ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
Green Power ON UCD9248 Power Controllers U32, U33, U34 DS13 PWRCTL_PWRGOOD Green Power Good (board supply voltages minimum > operating voltage) DS24 PWRCTL1_VCC4A_PG Green FMC1, FMC2 Power Good ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
UG850_c1_20_032719 Figure 1-20: Ethernet PHY User LEDs User I/O [Figure 1-2, callout 17–28] The ZC702 board provides the following user and general purpose I/O capabilities: • Ten user LEDs (callout 17) PMOD0 0–PMOD0 3 and PMOD1 0–PMOD1 3: DS15–DS22 °...
[Figure 1-2, callout 17] The ZC702 board supports eight user LEDs connected to XC7Z020 SoC Banks 13, 33, 34, and 35 through level-shifters. Note that the LEDs are wired in parallel with headers J63 (PMOD1) and J62 (PMOD2). These headers are described in User PMOD GPIO Headers.
SW14.4 and SW15.2 User PMOD GPIO Headers [Figure 1-2, callout 28] The ZC702 board supports two GPIO headers J62 and J63. The PMOD nets connected to these headers are dual-purpose, with the User LEDs wired in parallel to the header pins.
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UG850_c1_25_030513 Figure 1-25: User GPIO Headers When using the PMOD headers on the Zynq-7000 SoC ZC702 evaluation kit, the voltage level output might appear normal at steady state; however, the rise and fall times on the other side of the TXS0108E level shifters can be several microseconds. The paralleled LED driver NDS331N FET has a gate capacitance of ~200 pF.
Do NOT plug a PC ATX power supply 6-pin connector into J60 on the ZC702 board. The ATX CAUTION! 6-pin connector has a different pinout than J60. Connecting an ATX 6-pin connector into J60 damages the ZC702 board and voids the board warranty.
This reset is used to force a system reset. It can be tied or pulled High, and can be PS_SRST_B: High during the PS supply power ramps. Refer to the Zynq-7000 SoC Technical Reference Manual [Ref 2] for information (UG585) concerning the resets. ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
(LPC) connectors at J3 and J4. Both connectors use a 10 x 40 form factor that is partially populated with 160 pins. The connectors are keyed so that a the mezzanine card faces away from the ZC702 board when connected.
1-2, callout 25] TheZC702 PCB layout and power system design meets the recommended criteria described in the Zynq-7000 SoC PCB Design Guide (UG933) [Ref 13]. The ZC702 board power distribution diagram is shown in Figure 1-29. ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
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PMBus Addr 0b0110110 Switching Regulator VCC3V3 3.3V at 10A VCC2V5 Switching Regulator 2.5V at 10A Linear Regulator VTTDDR 0.75V at 3A VREF UG850_c1_29_090215 Figure 1-29: Onboard Power Regulators ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
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Feature Descriptions The ZC702 board uses power regulators and a PMBus compliant system controller from Texas Instruments to supply core and auxiliary voltages as listed in Table 1-30. The Texas Instruments Fusion Digital Power graphical user interface is used to monitor the voltage and current levels of the board power modules.
Low by the user logic and the VADJ rail comes up at the new VADJ voltage level. Installing a jumper at J12 after a ZC702 board powers up in this mode turns on the VADJ rail. The FMC_VADJ_ON_B signal is sourced by the TCA6416APWR I2C port expander U80 pin 13...
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1.15 Notes: 1. The values defined in these columns are the voltage, current, and temperature thresholds that causes the regulator to shut down if the value is exceeded. ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
1-30. X-Ref Target - Figure 1-30 VCC12_P UG850_c1_30_030513 Figure 1-30: Cooling Fan Circuit More information about the power system components used by the ZC702 board are available from the Texas Instruments digital power website [Ref 25]. ZC702 Board User Guide www.xilinx.com...
100Ω UG850_c1_31_031819 Figure 1-31: XADC Block Diagram The ZC702 board supports both the internal XC7Z020 SoC sensor measurements and the external measurement capabilities of the XADC. Internal measurements of the die temperature, VCCINT, VCCAUX, and VCCBRAM are available. ZC702 Board User Guide www.xilinx.com...
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Digital I/O. These pins should come from the same bank. These I/Os XADC_GPIO_3, 2, 1, 0 19, 20, 17, 18 should not be shared with other functions because they are required to support 3-state operation. ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
Position Setting Callout SW10 (JTAG chain input select two-position DIP switch) SW12 (two-position DIP switch) SW15 (two-position DIP switch) Right Right SW16 Right (five-position DIP switch) Right Right ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
Jumper Function Default Position HDR_1 X 2 CFGBVS short to GND ZC702 configuration bank 0 is operated at 2.5V, therefore the CFGBVS pin is pulled high with a resistor. Jumper J5 should be never installed. POR Master Reset USB 2.0 USB_VBUS_SEL...
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ETHERNET PHY HDR NONE USB 2.0 MODE USB 2.0 J1 ID SEL USB 2.0 J1 VBUS CAP SEL USB 2.0 J1 GND SEL XADC_VREP SEL XADC_VCC SEL XADC_VREF SOURCE SEL ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
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Jumpers Figure A-1 shows jumper locations described in this table. X-Ref Target - Figure A-1 22 23 18 17 19 20 UG850_a1_01_011415 Figure A-1: Jumper Locations ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
Figure B-1 shows the pinout of the FPGA mezzanine card (FMC) low pin count (LPC) connector defined by the VITA 57.1 FMC specification. For a description of how the ZC702 board implements the FMC specification, see FPGA Mezzanine (FMC) Card Interface...
The ZC702 Xilinx® Design Constraints (XDC) template provides for designs targeting the ZC702 board. Net names in the constraints correlate with net names on the latest ZC702 board schematic. You must identify the appropriate pins and replace the net names below with net names in your RTL.
Width: 7.750 in. (19.685 cm) Length: 7.150 in. (18.161 cm) Environmental Temperature Operating: 0°C to +45°C Storage: –25°C to +60°C Humidity 10% to 90% non-condensing Operating Voltage +12 V ZC702 Board User Guide www.xilinx.com Send Feedback UG850 (v1.7) March 27, 2019...
This product is designed and tested to conform to the European Union directives and standards described in this section. Refer to the ZC702 board master answer record concerning the CE requirements for the PC Test Environment: ZC702 Evaluation Kit – Master Answer Record 47864 Zynq-7000 ZC702 Declaration of Conformity is online.
Xilinx has met its national obligations to the EU WEEE Directive by registering in those countries to which Xilinx is an importer. Xilinx has also elected to join WEEE Compliance Schemes in some countries to help manage customer returns at end-of-life.
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Topics include design assistance, advisories, and troubleshooting tips. References The most up to date information related to the ZC702 board and its documentation is available on the following websites. ZC702 Evaluation Kit ZC702 Evaluation Kit –...
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