Cooling Fan - Xilinx ZC706 User Manual

Evaluation board for the zynq-7000 xc7z045 all programmable soc
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Table 1-38: Power Rail Sequence On Dependencies for UCD90120A PMBus Controller at Address 101
Device
Address
UCD90120A
101d

Cooling Fan

The XC7Z045 AP SoC cooling fan connector is shown in
X-Ref Target - Figure 1-36
Keyed Fan Header
22_11_2032
J61
SM FAN PWM
When V
is modified from a default of 2.5V to 1.8V or a lower V
ADJ
cooling fan turns off. Transistor Q1 is used to switch on the fan and has a max VGS of 2V,
hence the fan is not guaranteed to work at 1.8V or lower V
The fan turns on when the ZC706 is powered up due to pull-up resistor R369. The
SM_FAN_PWM and SM_FAN_TACH signals are wired to XC7Z045 AP SoC U1 pins AB19 and
ZC706 Evaluation Board User Guide
UG954 (v1.5) September 10, 2015
Nominal
Rail
Voltage
1
VCCINT
1.000
2
VCCAUX
1.800
5
VCC3V3_FPGA
3.300
3
VCC1V5_PL
1.500
4
VADJ_FPGA
2.500
VCC12_P
1
2
3
1
2
VADJ
R369
1
1.00K
1/16W
2
4
2
1%
Q1
1.3W
1
NDT3055L
3
GND
Figure 1-36: Cooling Fan Circuit
www.xilinx.com
Turn On Order
1
2
3
4
5
Figure
R279
1
10.0K
1/10W
2
1%
1
2
R278
10.0K
D1
1/10W
DL4148
1%
100V
460MW
R190
1
4.75K
1/10W
2
1%
GND
ADJ,
Feature Descriptions
Turn On Timing
Turn on at board power-on
5ms after VCCINT hits 90%
5ms after VCCAUX hits 90%
5ms after VCC3V3 hits 90%
5ms after VCC1V5_PL hits 90%
1-36.
SM FAN TACH
D2
2
MM3Z2V7B
2.7V
460MW
1
UG954_c1_36_073013
setting, the AP SoC U1
ADJ
setting. See
[Ref
15].
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