Xilinx ZC706 User Manual page 9

FMC Power Good
°
12V Input Power On
°
FPGA INIT
°
FPGA DONE
°
• User I/O:
Four (PL) user LEDs
°
Three (PL) user pushbuttons
°
One (PL) user DIP switch (4-pole)
°
Two Dual row Pmod GPIO headers
°
• AP SoC PS Reset Pushbuttons:
SRST_B PS reset button
°
POR_B PS reset button
°
• VITA 57.1 FMC HPC connector
• VITA 57.1 FMC LPC connector
• Power on/off slide switch
• Program_B pushbutton
• Power management with PMBus voltage and current monitoring through TI power
controller
• Dual 12-bit 1 MSPS XADC analog-to-digital front end
• Configuration options:
Dual Quad-SPI flash memory
°
USB JTAG configuration port (Digilent module)
°
Platform cable header JTAG configuration port
°
20-pin PL PJTAG header
°
ZC706 Evaluation Board User Guide
UG954 (v1.5) September 10, 2015
www.xilinx.com
Overview
9
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