Xilinx ZC706 User Manual page 103

set_property PACKAGE_PIN L1 [get_ports PL_DDR3_D0]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D0]
set_property PACKAGE_PIN L2 [get_ports PL_DDR3_D1]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D1]
set_property PACKAGE_PIN K5 [get_ports PL_DDR3_D2]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D2]
set_property PACKAGE_PIN J4 [get_ports PL_DDR3_D3]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D3]
set_property PACKAGE_PIN K1 [get_ports PL_DDR3_D4]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D4]
set_property PACKAGE_PIN L3 [get_ports PL_DDR3_D5]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D5]
set_property PACKAGE_PIN J5 [get_ports PL_DDR3_D6]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D6]
set_property PACKAGE_PIN K6 [get_ports PL_DDR3_D7]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D7]
set_property PACKAGE_PIN G6 [get_ports PL_DDR3_D8]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D8]
set_property PACKAGE_PIN H4 [get_ports PL_DDR3_D9]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D9]
set_property PACKAGE_PIN H6 [get_ports PL_DDR3_D10]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D10]
set_property PACKAGE_PIN H3 [get_ports PL_DDR3_D11]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D11]
set_property PACKAGE_PIN G1 [get_ports PL_DDR3_D12]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D12]
set_property PACKAGE_PIN H2 [get_ports PL_DDR3_D13]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D13]
set_property PACKAGE_PIN G5 [get_ports PL_DDR3_D14]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D14]
set_property PACKAGE_PIN G4 [get_ports PL_DDR3_D15]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D15]
set_property PACKAGE_PIN E2 [get_ports PL_DDR3_D16]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D16]
set_property PACKAGE_PIN E3 [get_ports PL_DDR3_D17]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D17]
set_property PACKAGE_PIN D4 [get_ports PL_DDR3_D18]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D18]
set_property PACKAGE_PIN E5 [get_ports PL_DDR3_D19]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D19]
set_property PACKAGE_PIN F4 [get_ports PL_DDR3_D20]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D20]
set_property PACKAGE_PIN F3 [get_ports PL_DDR3_D21]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D21]
set_property PACKAGE_PIN D1 [get_ports PL_DDR3_D22]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D22]
set_property PACKAGE_PIN D3 [get_ports PL_DDR3_D23]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D23]
set_property PACKAGE_PIN A2 [get_ports PL_DDR3_D24]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D24]
set_property PACKAGE_PIN B2 [get_ports PL_DDR3_D25]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D25]
set_property PACKAGE_PIN B4 [get_ports PL_DDR3_D26]
set_property IOSTANDARD SSTL15 [get_ports PL_DDR3_D26]
ZC706 Evaluation Board User Guide
UG954 (v1.5) September 10, 2015
www.xilinx.com
ZC706 Evaluation Board XDC Listing
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