Xadc Analog-To-Digital Converter - Xilinx ZC702 User Manual

For the zynq-7000 xc7z020 all programmable soc
Hide thumbs Also See for ZC702:
Table of Contents

Advertisement

XADC Analog-to-Digital Converter

[Figure
1-2, callout 26]
The XC7Z020 AP SoC provides an Analog Front End XADC block. The XADC block includes
a dual 12-bit, 1 MSPS Analog-to-Digital Convertor (ADC) and on-chip sensors. See the
7 Series FPGAs XADC Dual 12-Bit 1MSPS Analog-to-Digital Converter User Guide (UG480)
[Ref 8]
for details on the capabilities of the analog front end.
block diagram.
X-Ref Target - Figure 1-31
U1
XC7Z020
Dual Use IO
(Analog/Digital)
100Ω
VAUX0P
1 nF
VAUX0N
To
100Ω
Header
J49
100Ω
VAUX8P
1 nF
VAUX8N
100Ω
The ZC702 board supports both the internal XC7Z020 AP SoC sensor measurements and the
external measurement capabilities of the XADC. Internal measurements of the die
temperature, VCCINT, VCCAUX, and VCCBRAM are available.
ZC702 Board User Guide
UG850 (v1.3) June 4, 2014
AP SoC
To J70.3
XADC_VCC
VCCADC
100 nF
Close to
Package Pins
XADC_AGND
GNDADC
XADC_AGND
V REF (1.25V)
J37
1
V REFP
2
V REFP
100 nF
3
Close to
Package Pins
V REFN
100Ω
V P
1 nF
V N
100Ω
DXP
DXN
Figure 1-31: XADC Block Diagram
www.xilinx.com
VCCAUX
Ferrite Bead
1
J38
XADC_VCC Header J40
2
1.8V 150 mV max
U10
ADP123
3
Out
In
Gnd
10 μF
XADC_AGND
U29
To Header J40
REF3012
Out
In
Gnd
10 μF
Internal
Reference
Ferrite Bead
XADC_AGND
XADC_AGND
Star Grid
Connection
To
Header
J40
Feature Descriptions
Figure 1-31
shows the XADC
VCC5V0 To Header J40
Ferrite Bead
J65
10 μF
Filter 5V Supply
Locate Components on Board
J70
1
2
3
XADC_VCC
J9
GND
J8
UG850_c1_31_030513
Send Feedback
VCC5V0
61

Advertisement

Table of Contents
loading

Table of Contents