Processing System Clock Source; Gtx Sma Clock (Sma_Mgt_Refclk_P And Sma_Mgt_Refclk_N) - Xilinx ZC706 User Manual

Processing System Clock Source

The Processing System (PS) clock source is a 1.8V LVCMOS single-ended fixed
33.33333 MHz oscillator at U24. It is wired to PS bank 500, pin A22 (PS_CLK), on the
XC7Z045 AP SoC.
• Oscillator: SiTime SiT8103AC-23-18E-33.33333 (33.3 MHz)
• Frequency tolerance: 50 ppm
• Single-ended output
The system clock circuit is shown in
X-Ref Target - Figure 1-14
For more details, see the SiTime SiT8103 data sheet

GTX SMA Clock (SMA_MGT_REFCLK_P and SMA_MGT_REFCLK_N)

[Figure 1-2, callout 10]
The ZC706 board includes a pair of SMA connectors for a GTX clock wired to GTX Quad bank
111. This differential clock has signal names SMA_MGT_REFCLK_P and SMA_REFCLK_N,
which are connected to AP SoC U1 pins W8 and W7 respectively.
• External user-provided GTX reference clock on SMA input connectors
• Differential Input
ZC706 Evaluation Board User Guide
UG954 (v1.5) September 10, 2015
Figure
U24
VCCP1V8
SiT8103
1
Oscillator
R38
33.33333 MHz
4.7KΩ
2 50 PPM
1/10W
5%
1
OE
2
GND
GND
Figure 1-14: Processing System Clock Source
www.xilinx.com
1-14.
VCCP1V8
1 C349
0.01 μF 25V
2
X7R
4
VCC GND
3
1 2
OUT
R173
24.9Ω
1/10W 1%
UG954_c1_14_041113
[Ref 20].
Feature Descriptions
PS CLK
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