Programmable Logic Jtag Programming Options; Programmable Logic Jtag Select Switch - Xilinx ZC706 User Manual

Programmable Logic JTAG Programming Options

[Figure 1-2, callout 6]
The ZC706 evaluation board JTAG chain is shown in
X-Ref Target - Figure 1-9
J3
JTAG
Header
TDO
TDI
U45
U46
U30
U47
JTAG 3:1
Module Analog
Switch
TDO
TDI
J62
JTAG
ON
Header
1
TDO
SW4
TDI

Programmable Logic JTAG Select Switch

[Figure 1-2, callout 35]
The PL JTAG chain can be programmed by three different methods made available through
a 3-to-1 analog switch (U45, U46, and U47) controlled by a 2-position DIP switch at SW4.
Figure 1-10 shows the JTAG analog switches and DIP switch SW4.
ZC706 Evaluation Board User Guide
UG954 (v1.5) September 10, 2015
SPST Bus Switch
U32
N.C.
J37
FMC HPC
Connector
TDI TDO
2
Figure 1-9: JTAG Chain Block Diagram
www.xilinx.com
Figure 1-9.
SPST Bus Switch
U31
N.C.
3.3V 3.3V
J5
U10
FMC LPC
SN74AVC2T245
Connector
and
SN74LV541APWR
Buffers
TDI TDO TDI
Feature Descriptions
U1
Zynq-7000
XC7Z045
AP SoC
TDI
TDO
TDO
UG954_c1_09_041113
31
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