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VC709 Evaluation Board Features
Chapter 1:
FPGA Cooling Fan Operation
The FPGA cooling fan control circuit has its PWM signal wired to a dual-use FPGA bank 15 pin
BA37. After configuration, this pin is expected to be toggled by user-provided fan speed control IP
to control fan speed. The fan tachometer feedback signal is wired to FPGA bank 15 pin BB37.
FPGA U1 pin BA37 is alternately an unused BPI flash memory address pin (A28). During FPGA
configuration in BPI mode, the BPI flash memory address lines are driven. The BA37 pin is held
low during BPI configuration and thus the fan PWM signal is not active and the cooling fan is off
during the FPGA BPI configuration process.
After configuration is complete, the dual-use FPGA pin BA37 is available for use by user-provided
fan speed control IP. If no IP is implemented, this pin should be driven High or placed into high
impedance mode so pull-up resistor R198 can pull SM_FAN_PWM high to turn the fan on.
More information about the power system components used by the VC709 board is available from
the
Documentation describing PMBus programming for the UCD9248 digital power controller is
available at the
Note:
moderate to high current levels (due to a customer design) might generate substantial heat that can
result in unexpected power module shutdowns from over-temperature conditions. This then turns off
the FPGA on the development board. Refer to the
Record (AR 51901)
XADC Analog-to-Digital Converter
The 7 series FPGAs provide an Analog Front End XADC block. The XADC block includes a dual
12-bit, 1 MSPS Analog-to-Digital Convertor (ADC) and on-chip sensors. See 7 Series FPGAs and
Zynq-7000 All Programmable SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User
Guide (UG480)
XADC block diagram.
64
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It has been noted that power modules on the VC709 evaluation board that operate at
concerning the solution.
[Ref 9]
for details on the capabilities of the analog front end.
www.xilinx.com
website.
documentation website.
Virtex-7 VC709 Evaluation Kit Master Answer
Figure 1-26
shows the
VC709 Evaluation Board
UG887 (v1.6) March 11, 2019
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