Tektronix WVR8200 User Manual page 74

Waveform rasterizers
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Dual Link and Quad Link
formats
54
Relative to: Use this selection to define the zero timing offset. This selection
changes both the numeric readouts and the target in the middle of the timing
display. You can select one of the following:
Analog (DAC), which means the timing offset of the signal inputs are
compensated for the delay of a nominal D-to-A converter (DAC). After
accounting for the DAC, the delay will be shown as zero when the signals
are timed down at the rear of the instrument.
The DAC delay is not applied to composite inputs, or 3G-SDI signals, so
the Analog (DAC) and Serial (0H) settings are equivalent for 3G and
composite inputs. This is the setting that was called "Rear Panel" in some
earlier instruments.
Serial (OH), which means the timing offset of the serial stream is
considered to be zero when the OH sample of the scrambled serial stream
is coincident with the appropriate sync edge of the analog reference at the
rear panel of the instrument.
This setting is also allowed for composite inputs where the reference
sync points of the two signals will be coincident at the rear panel of the
instrument.
Saved Offset, which means that the timing is shown as zero offset when
the input signal matches the timing of the signal that was present when the
offset was saved using the Save Offset menu entry. This works for both
SDI and composite inputs. It can also be used when comparing the timing
between two inputs in Simultaneous Input Mode (SIM).
Reference To: For multi-link signals, use this selection to choose between the
following display references:
Ext Ref: Shows the timing difference between the input signal and the
external reference signal.
Other Input: Shows the timing difference between the different links in
the input signal.
NOTE.
In Simultaneous Input Mode (SIM) or UHD/4K modes, the selected
Reference To can be the external reference or the other SDI input.
When the Timing display is used for Dual Link and Quad Link formats, an
interchannel timing measurement is made between Link 1A and the other inputs.
The display shows the timing offset from 1A in number of clocks or time
advanced or delayed relative to the 1A input.
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