Epson S1C17F13 Technical Manual page 113

Data transfer operations
The following shows the slave mode operations different from master mode:
• Slave mode operates with the SPI clock supplied from the external SPI master to the SPICLKn pin.
The data transfer rate is determined by the SPICLKn frequency. It is not necessary to control the 16-bit timer.
• The SPI can operate as a slave device only when the slave select signal input from the external SPI master to
the #SPISSn pin is set to the active (low) level.
If #SPISSn = high, the software transfer control, the SPICLKn pin input, and the SDIn pin input are all inef-
fective. If the #SPISSn signal goes high during data transfer, the transfer bit counter is cleared and data in the
shift register is discarded.
• Slave mode starts data transfer when SPICLKn is input from the external SPI master after the #SPISSn signal
is asserted. Writing transmit data is not a trigger to start data transfer. Therefore, it is not necessary to write
dummy data to the transmit data buffer when performing data reception only.
• Data transmission/reception can be performed even in SLEEP mode, it makes it possible to wake the CPU up
using an SPI interrupt.
Other operations are the same as master mode.
Notes: • If 8-bit data is received when the SPInINTF.RBFIF bit is set to 1, the SPInRXD register is over-
written with the newly received 8-bit data and the previously received data is lost. There is no
flag provided for indicating a loss of data.
• When the clock for the first bit is input from the SPICLKn pin, the SPI starts sending the 8-bit
data currently stored in the shift register even if the SPInINTF.TBEIF bit is set to 1.
#SPISSn
SPICLKn
SDOn
SDIn
SPInINTF.TBEIF
SPInINTF.RBFIF
Software operations
Figure 11.
Data transmission
Read the SPInINTF.TBEIF bit
SPInINTF.TBEIF = 1 ?
YES
Write transmit data to
the SPInTXD register
Transmit data remained?
NO
End
S1C17F13 TeChniCal Manual
(Rev. 1.0)
1 2 3 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
Data (W) → SPInTXD Data (W) → SPInTXD
5.5.1 Example of Data Transfer Operations in Slave Mode
NO
YES
Wait for an interrupt request
(SPInINTF.TBEIF = 1)
Figure 11. 5.5.2 Data Transfer Flowcharts in Slave Mode
Seiko epson Corporation
11 SYNCHRONOUS SERIAL INTERFACE (SPI)
1 2 3 4 5 6 7 8
Data (W) → SPInTXD
SPInRXD → Data (R)
Data reception
Wait for an interrupt request
(SPInINTF.RBFIF = 1)
Read receive data from
the SPInRXD register
Receive data remained?
NO
End
SPInRXD → Data (R)
YES
11-9