Table of Contents
Advertisement
11 SYNCHRONOUS SERIAL INTERFACE (SPI)
11.5.6
Terminating Data Transfer in Slave Mode
A procedure to terminate data transfer in slave mode is shown below.
1. Wait for an end-of-transmission interrupt (SPInINTF.TENDIF bit = 1). Or determine end of transfer via the re-
ceived data.
2. Set the SPInCTL.MODEN bit to 0 to disable the SPI Ch.n operations.
11.6
Interrupts
The SPI has a function to generate the interrupts shown in Table 11.6.1.
Interrupt
End of transmission
SPInINTF.TENDIF
Receive buffer full
SPInINTF.RBFIF
Transmit buffer empty SPInINTF.TBEIF
The SPI provides interrupt enable bits corresponding to each interrupt flag. An interrupt request is sent to the inter-
rupt controller only when the interrupt flag, of which interrupt has been enabled by the interrupt enable bit, is set.
For more information on interrupt control, refer to the "Interrupt Controller" chapter.
The SPInINTF register also contains the BSY bit that indicates the SPI operating status.
Figure 11.6.1 shows the SPInINTF.BSY and SPInINTF.TENDIF bit set timings.
Master mode
SPInMOD register
CPOL bit
CPHA bit
1
0
SPInINTF.TENDIF
Slave mode
SPInMOD register
CPOL bit
CPHA bit
1
1
0
0
SPInINTF.TENDIF
Figure 11.
11-10
Table 11.
6.1 SPI Interrupt Function
Interrupt flag
When the SPInINTF.TBEIF bit = 1 after the eighth
data bit has been sent
When the eighth data bit is received and the received
data is transferred from the shift register to the re-
ceived data buffer
When transmit data written to the transmit data buf-
fer is transferred to the shift register
1
SPICLKn
0
SDOn
SPInINTF.BSY
Writing data to the SPInTXD register
#SPISSn
SPInINTF.BSY
SPICLKn
SDOn
SPICLKn
SDOn
Writing data to the SPInTXD register
6.1 SPI
nINTF.BSY and SPInINTF.TENDIF Bit Set Timings
Seiko epson Corporation
Set condition
1
2
3
1
2
3
Clear condition
Writing 1
Reading the SPIn-
RXD register
Writing to the
SPInTXD register
7
8
7
8
S1C17F13 TeChniCal Manual
(Rev. 1.0)
Advertisement
Table of Contents
